esp8266/gpio/
gpio_rtc_calib_value.rs1#[doc = "Register `GPIO_RTC_CALIB_VALUE` reader"]
2pub struct R(crate::R<GPIO_RTC_CALIB_VALUE_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<GPIO_RTC_CALIB_VALUE_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<GPIO_RTC_CALIB_VALUE_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<GPIO_RTC_CALIB_VALUE_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `GPIO_RTC_CALIB_VALUE` writer"]
17pub struct W(crate::W<GPIO_RTC_CALIB_VALUE_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<GPIO_RTC_CALIB_VALUE_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<GPIO_RTC_CALIB_VALUE_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<GPIO_RTC_CALIB_VALUE_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `RTC_CALIB_RDY` reader - 0: during RTC-clock-calibration; 1: RTC-clock-calibration is done"]
38pub struct RTC_CALIB_RDY_R(crate::FieldReader<bool, bool>);
39impl RTC_CALIB_RDY_R {
40 #[inline(always)]
41 pub(crate) fn new(bits: bool) -> Self {
42 RTC_CALIB_RDY_R(crate::FieldReader::new(bits))
43 }
44}
45impl core::ops::Deref for RTC_CALIB_RDY_R {
46 type Target = crate::FieldReader<bool, bool>;
47 #[inline(always)]
48 fn deref(&self) -> &Self::Target {
49 &self.0
50 }
51}
52#[doc = "Field `RTC_CALIB_RDY` writer - 0: during RTC-clock-calibration; 1: RTC-clock-calibration is done"]
53pub struct RTC_CALIB_RDY_W<'a> {
54 w: &'a mut W,
55}
56impl<'a> RTC_CALIB_RDY_W<'a> {
57 #[doc = r"Sets the field bit"]
58 #[inline(always)]
59 pub fn set_bit(self) -> &'a mut W {
60 self.bit(true)
61 }
62 #[doc = r"Clears the field bit"]
63 #[inline(always)]
64 pub fn clear_bit(self) -> &'a mut W {
65 self.bit(false)
66 }
67 #[doc = r"Writes raw bits to the field"]
68 #[inline(always)]
69 pub fn bit(self, value: bool) -> &'a mut W {
70 self.w.bits = (self.w.bits & !(1 << 31)) | ((value as u32 & 1) << 31);
71 self.w
72 }
73}
74#[doc = "Field `RTC_CALIB_RDY_REAL` reader - 0: during RTC-clock-calibration; 1: RTC-clock-calibration is done"]
75pub struct RTC_CALIB_RDY_REAL_R(crate::FieldReader<bool, bool>);
76impl RTC_CALIB_RDY_REAL_R {
77 #[inline(always)]
78 pub(crate) fn new(bits: bool) -> Self {
79 RTC_CALIB_RDY_REAL_R(crate::FieldReader::new(bits))
80 }
81}
82impl core::ops::Deref for RTC_CALIB_RDY_REAL_R {
83 type Target = crate::FieldReader<bool, bool>;
84 #[inline(always)]
85 fn deref(&self) -> &Self::Target {
86 &self.0
87 }
88}
89#[doc = "Field `RTC_CALIB_RDY_REAL` writer - 0: during RTC-clock-calibration; 1: RTC-clock-calibration is done"]
90pub struct RTC_CALIB_RDY_REAL_W<'a> {
91 w: &'a mut W,
92}
93impl<'a> RTC_CALIB_RDY_REAL_W<'a> {
94 #[doc = r"Sets the field bit"]
95 #[inline(always)]
96 pub fn set_bit(self) -> &'a mut W {
97 self.bit(true)
98 }
99 #[doc = r"Clears the field bit"]
100 #[inline(always)]
101 pub fn clear_bit(self) -> &'a mut W {
102 self.bit(false)
103 }
104 #[doc = r"Writes raw bits to the field"]
105 #[inline(always)]
106 pub fn bit(self, value: bool) -> &'a mut W {
107 self.w.bits = (self.w.bits & !(1 << 30)) | ((value as u32 & 1) << 30);
108 self.w
109 }
110}
111#[doc = "Field `RTC_CALIB_VALUE` reader - The cycle number of clk_xtal (crystal clock) for the RTC_PERIOD_NUM cycles of RTC-clock"]
112pub struct RTC_CALIB_VALUE_R(crate::FieldReader<u32, u32>);
113impl RTC_CALIB_VALUE_R {
114 #[inline(always)]
115 pub(crate) fn new(bits: u32) -> Self {
116 RTC_CALIB_VALUE_R(crate::FieldReader::new(bits))
117 }
118}
119impl core::ops::Deref for RTC_CALIB_VALUE_R {
120 type Target = crate::FieldReader<u32, u32>;
121 #[inline(always)]
122 fn deref(&self) -> &Self::Target {
123 &self.0
124 }
125}
126#[doc = "Field `RTC_CALIB_VALUE` writer - The cycle number of clk_xtal (crystal clock) for the RTC_PERIOD_NUM cycles of RTC-clock"]
127pub struct RTC_CALIB_VALUE_W<'a> {
128 w: &'a mut W,
129}
130impl<'a> RTC_CALIB_VALUE_W<'a> {
131 #[doc = r"Writes raw bits to the field"]
132 #[inline(always)]
133 pub unsafe fn bits(self, value: u32) -> &'a mut W {
134 self.w.bits = (self.w.bits & !0x000f_ffff) | (value as u32 & 0x000f_ffff);
135 self.w
136 }
137}
138impl R {
139 #[doc = "Bit 31 - 0: during RTC-clock-calibration; 1: RTC-clock-calibration is done"]
140 #[inline(always)]
141 pub fn rtc_calib_rdy(&self) -> RTC_CALIB_RDY_R {
142 RTC_CALIB_RDY_R::new(((self.bits >> 31) & 1) != 0)
143 }
144 #[doc = "Bit 30 - 0: during RTC-clock-calibration; 1: RTC-clock-calibration is done"]
145 #[inline(always)]
146 pub fn rtc_calib_rdy_real(&self) -> RTC_CALIB_RDY_REAL_R {
147 RTC_CALIB_RDY_REAL_R::new(((self.bits >> 30) & 1) != 0)
148 }
149 #[doc = "Bits 0:19 - The cycle number of clk_xtal (crystal clock) for the RTC_PERIOD_NUM cycles of RTC-clock"]
150 #[inline(always)]
151 pub fn rtc_calib_value(&self) -> RTC_CALIB_VALUE_R {
152 RTC_CALIB_VALUE_R::new((self.bits & 0x000f_ffff) as u32)
153 }
154}
155impl W {
156 #[doc = "Bit 31 - 0: during RTC-clock-calibration; 1: RTC-clock-calibration is done"]
157 #[inline(always)]
158 pub fn rtc_calib_rdy(&mut self) -> RTC_CALIB_RDY_W {
159 RTC_CALIB_RDY_W { w: self }
160 }
161 #[doc = "Bit 30 - 0: during RTC-clock-calibration; 1: RTC-clock-calibration is done"]
162 #[inline(always)]
163 pub fn rtc_calib_rdy_real(&mut self) -> RTC_CALIB_RDY_REAL_W {
164 RTC_CALIB_RDY_REAL_W { w: self }
165 }
166 #[doc = "Bits 0:19 - The cycle number of clk_xtal (crystal clock) for the RTC_PERIOD_NUM cycles of RTC-clock"]
167 #[inline(always)]
168 pub fn rtc_calib_value(&mut self) -> RTC_CALIB_VALUE_W {
169 RTC_CALIB_VALUE_W { w: self }
170 }
171 #[doc = "Writes raw bits to the register."]
172 #[inline(always)]
173 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
174 self.0.bits(bits);
175 self
176 }
177}
178#[doc = "0: during RTC-clock-calibration; 1: RTC-clock-calibration is done\n\nThis register you can [`read`]
179(crate::generic::Reg::read), [`write_with_zero`]
180(crate::generic::Reg::write_with_zero), [`reset`]
181(crate::generic::Reg::reset), [`write`]
182(crate::generic::Reg::write), [`modify`]
183(crate::generic::Reg::modify). See [API]
184(https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gpio_rtc_calib_value]
185(index.html) module"]
186pub struct GPIO_RTC_CALIB_VALUE_SPEC;
187impl crate::RegisterSpec for GPIO_RTC_CALIB_VALUE_SPEC {
188 type Ux = u32;
189}
190#[doc = "`read()` method returns [gpio_rtc_calib_value::R]
191(R) reader structure"]
192impl crate::Readable for GPIO_RTC_CALIB_VALUE_SPEC {
193 type Reader = R;
194}
195#[doc = "`write(|w| ..)` method takes [gpio_rtc_calib_value::W]
196(W) writer structure"]
197impl crate::Writable for GPIO_RTC_CALIB_VALUE_SPEC {
198 type Writer = W;
199}
200#[doc = "`reset()` method sets GPIO_RTC_CALIB_VALUE to value 0"]
201impl crate::Resettable for GPIO_RTC_CALIB_VALUE_SPEC {
202 #[inline(always)]
203 fn reset_value() -> Self::Ux {
204 0
205 }
206}