Expand description
SPI_CTRL
Structs
Field enable_ahb reader - Enable AHB
Field enable_ahb writer - Enable AHB
Field hold_mode reader - Hold mode
Field hold_mode writer - Hold mode
Register SPI_CTRL reader
Field res_and_res reader - ‘Res and res’?
Field res_and_res writer - ‘Res and res’?
Field share_but reader - Share bus
Field share_but writer - Share bus
SPI_CTRL
Field spi_dio_mode reader - In the read operations, “address” phase and “read-data” phase apply 2 signals
Field spi_dio_mode writer - In the read operations, “address” phase and “read-data” phase apply 2 signals
Field spi_dout_mode reader - In the read operations, “read-data” phase apply 2 signals
Field spi_dout_mode writer - In the read operations, “read-data” phase apply 2 signals
Field spi_fastrd_mode reader - this bit enable the bits: spi_qio_mode, spi_dio_mode, spi_qout_mode and spi_dout_mode
Field spi_fastrd_mode writer - this bit enable the bits: spi_qio_mode, spi_dio_mode, spi_qout_mode and spi_dout_mode
Field spi_qio_mode reader - In the read operations, “address” phase and “read-data” phase apply 4 signals
Field spi_qio_mode writer - In the read operations, “address” phase and “read-data” phase apply 4 signals
Field spi_qout_mode reader - In the read operations, “read-data” phase apply 4 signals
Field spi_qout_mode writer - In the read operations, “read-data” phase apply 4 signals
Field spi_rd_bit_order reader - In “read-data” (MISO) phase, 1: LSB first; 0: MSB first
Field spi_rd_bit_order writer - In “read-data” (MISO) phase, 1: LSB first; 0: MSB first
Field spi_wr_bit_order reader - In “command”, “address”, “write-data” (MOSI) phases, 1: LSB first; 0: MSB first
Field spi_wr_bit_order writer - In “command”, “address”, “write-data” (MOSI) phases, 1: LSB first; 0: MSB first
Field sst_aai reader - SST_AAI?
Field sst_aai writer - SST_AAI?
Field two_byte_status reader - Enable two byte status
Field two_byte_status writer - Enable two byte status
Register SPI_CTRL writer
Field wp_reg reader - Write protect?
Field wp_reg writer - Write protect?