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#[doc = "Reader of register IO_MUX_CONF"]
pub struct R(crate::R<IO_MUX_CONF_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<IO_MUX_CONF_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::convert::From<crate::R<IO_MUX_CONF_SPEC>> for R {
    fn from(reader: crate::R<IO_MUX_CONF_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Writer for register IO_MUX_CONF"]
pub struct W(crate::W<IO_MUX_CONF_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<IO_MUX_CONF_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl core::convert::From<crate::W<IO_MUX_CONF_SPEC>> for W {
    fn from(writer: crate::W<IO_MUX_CONF_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Reader of field `SPI0_CLK_EQU_SYS_CLK`"]
pub struct SPI0_CLK_EQU_SYS_CLK_R(crate::FieldReader<bool, bool>);
impl SPI0_CLK_EQU_SYS_CLK_R {
    pub(crate) fn new(bits: bool) -> Self {
        SPI0_CLK_EQU_SYS_CLK_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for SPI0_CLK_EQU_SYS_CLK_R {
    type Target = crate::FieldReader<bool, bool>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Write proxy for field `SPI0_CLK_EQU_SYS_CLK`"]
pub struct SPI0_CLK_EQU_SYS_CLK_W<'a> {
    w: &'a mut W,
}
impl<'a> SPI0_CLK_EQU_SYS_CLK_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
        self.w
    }
}
#[doc = "Reader of field `SPI1_CLK_EQU_SYS_CLK`"]
pub struct SPI1_CLK_EQU_SYS_CLK_R(crate::FieldReader<bool, bool>);
impl SPI1_CLK_EQU_SYS_CLK_R {
    pub(crate) fn new(bits: bool) -> Self {
        SPI1_CLK_EQU_SYS_CLK_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for SPI1_CLK_EQU_SYS_CLK_R {
    type Target = crate::FieldReader<bool, bool>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Write proxy for field `SPI1_CLK_EQU_SYS_CLK`"]
pub struct SPI1_CLK_EQU_SYS_CLK_W<'a> {
    w: &'a mut W,
}
impl<'a> SPI1_CLK_EQU_SYS_CLK_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
        self.w
    }
}
impl R {
    #[doc = "Bit 8"]
    #[inline(always)]
    pub fn spi0_clk_equ_sys_clk(&self) -> SPI0_CLK_EQU_SYS_CLK_R {
        SPI0_CLK_EQU_SYS_CLK_R::new(((self.bits >> 8) & 0x01) != 0)
    }
    #[doc = "Bit 9"]
    #[inline(always)]
    pub fn spi1_clk_equ_sys_clk(&self) -> SPI1_CLK_EQU_SYS_CLK_R {
        SPI1_CLK_EQU_SYS_CLK_R::new(((self.bits >> 9) & 0x01) != 0)
    }
}
impl W {
    #[doc = "Bit 8"]
    #[inline(always)]
    pub fn spi0_clk_equ_sys_clk(&mut self) -> SPI0_CLK_EQU_SYS_CLK_W {
        SPI0_CLK_EQU_SYS_CLK_W { w: self }
    }
    #[doc = "Bit 9"]
    #[inline(always)]
    pub fn spi1_clk_equ_sys_clk(&mut self) -> SPI1_CLK_EQU_SYS_CLK_W {
        SPI1_CLK_EQU_SYS_CLK_W { w: self }
    }
    #[doc = "Writes raw bits to the register."]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "IO_MUX_CONF\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [io_mux_conf](index.html) module"]
pub struct IO_MUX_CONF_SPEC;
impl crate::RegisterSpec for IO_MUX_CONF_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [io_mux_conf::R](R) reader structure"]
impl crate::Readable for IO_MUX_CONF_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [io_mux_conf::W](W) writer structure"]
impl crate::Writable for IO_MUX_CONF_SPEC {
    type Writer = W;
}
#[doc = "`reset()` method sets IO_MUX_CONF to value 0"]
impl crate::Resettable for IO_MUX_CONF_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}