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#[doc = "Reader of register SPI_SLAVE1"]
pub type R = crate::R<u32, super::SPI_SLAVE1>;
#[doc = "Writer for register SPI_SLAVE1"]
pub type W = crate::W<u32, super::SPI_SLAVE1>;
#[doc = "Register SPI_SLAVE1 `reset()`'s with value 0"]
impl crate::ResetValue for super::SPI_SLAVE1 {
    type Type = u32;
    #[inline(always)]
    fn reset_value() -> Self::Type {
        0
    }
}
#[doc = "Reader of field `slv_status_bitlen`"]
pub type SLV_STATUS_BITLEN_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `slv_status_bitlen`"]
pub struct SLV_STATUS_BITLEN_W<'a> {
    w: &'a mut W,
}
impl<'a> SLV_STATUS_BITLEN_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x1f << 27)) | (((value as u32) & 0x1f) << 27);
        self.w
    }
}
#[doc = "Reader of field `slv_buf_bitlen`"]
pub type SLV_BUF_BITLEN_R = crate::R<u16, u16>;
#[doc = "Write proxy for field `slv_buf_bitlen`"]
pub struct SLV_BUF_BITLEN_W<'a> {
    w: &'a mut W,
}
impl<'a> SLV_BUF_BITLEN_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u16) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01ff << 16)) | (((value as u32) & 0x01ff) << 16);
        self.w
    }
}
#[doc = "Reader of field `slv_rd_addr_bitlen`"]
pub type SLV_RD_ADDR_BITLEN_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `slv_rd_addr_bitlen`"]
pub struct SLV_RD_ADDR_BITLEN_W<'a> {
    w: &'a mut W,
}
impl<'a> SLV_RD_ADDR_BITLEN_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x3f << 10)) | (((value as u32) & 0x3f) << 10);
        self.w
    }
}
#[doc = "Reader of field `slv_wr_addr_bitlen`"]
pub type SLV_WR_ADDR_BITLEN_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `slv_wr_addr_bitlen`"]
pub struct SLV_WR_ADDR_BITLEN_W<'a> {
    w: &'a mut W,
}
impl<'a> SLV_WR_ADDR_BITLEN_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x3f << 4)) | (((value as u32) & 0x3f) << 4);
        self.w
    }
}
#[doc = "Reader of field `slv_wrsta_dummy_en`"]
pub type SLV_WRSTA_DUMMY_EN_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `slv_wrsta_dummy_en`"]
pub struct SLV_WRSTA_DUMMY_EN_W<'a> {
    w: &'a mut W,
}
impl<'a> SLV_WRSTA_DUMMY_EN_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
        self.w
    }
}
#[doc = "Reader of field `slv_rdsta_dummy_en`"]
pub type SLV_RDSTA_DUMMY_EN_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `slv_rdsta_dummy_en`"]
pub struct SLV_RDSTA_DUMMY_EN_W<'a> {
    w: &'a mut W,
}
impl<'a> SLV_RDSTA_DUMMY_EN_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
        self.w
    }
}
#[doc = "Reader of field `slv_wrbuf_dummy_en`"]
pub type SLV_WRBUF_DUMMY_EN_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `slv_wrbuf_dummy_en`"]
pub struct SLV_WRBUF_DUMMY_EN_W<'a> {
    w: &'a mut W,
}
impl<'a> SLV_WRBUF_DUMMY_EN_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
        self.w
    }
}
#[doc = "Reader of field `slv_rdbuf_dummy_en`"]
pub type SLV_RDBUF_DUMMY_EN_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `slv_rdbuf_dummy_en`"]
pub struct SLV_RDBUF_DUMMY_EN_W<'a> {
    w: &'a mut W,
}
impl<'a> SLV_RDBUF_DUMMY_EN_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
        self.w
    }
}
impl R {
    #[doc = "Bits 27:31 - In the slave mode, it is the length in bits for \"write-status\" and \"read-status\" operations. The register valueshall be (bit_num-1)"]
    #[inline(always)]
    pub fn slv_status_bitlen(&self) -> SLV_STATUS_BITLEN_R {
        SLV_STATUS_BITLEN_R::new(((self.bits >> 27) & 0x1f) as u8)
    }
    #[doc = "Bits 16:24 - In the slave mode, it is the length in bits for \"write-buffer\" and \"read-buffer\" operations. The register value shallbe (bit_num-1)"]
    #[inline(always)]
    pub fn slv_buf_bitlen(&self) -> SLV_BUF_BITLEN_R {
        SLV_BUF_BITLEN_R::new(((self.bits >> 16) & 0x01ff) as u16)
    }
    #[doc = "Bits 10:15 - In the slave mode, it is the address length in bits for \"read-buffer\" operation. The register value shall be(bit_num-1)"]
    #[inline(always)]
    pub fn slv_rd_addr_bitlen(&self) -> SLV_RD_ADDR_BITLEN_R {
        SLV_RD_ADDR_BITLEN_R::new(((self.bits >> 10) & 0x3f) as u8)
    }
    #[doc = "Bits 4:9 - In the slave mode, it is the address length in bits for \"write-buffer\" operation. The register value shall be(bit_num-1)"]
    #[inline(always)]
    pub fn slv_wr_addr_bitlen(&self) -> SLV_WR_ADDR_BITLEN_R {
        SLV_WR_ADDR_BITLEN_R::new(((self.bits >> 4) & 0x3f) as u8)
    }
    #[doc = "Bit 3 - In the slave mode, it is the enable bit of \"dummy\" phase for \"write-status\" operations."]
    #[inline(always)]
    pub fn slv_wrsta_dummy_en(&self) -> SLV_WRSTA_DUMMY_EN_R {
        SLV_WRSTA_DUMMY_EN_R::new(((self.bits >> 3) & 0x01) != 0)
    }
    #[doc = "Bit 2 - In the slave mode, it is the enable bit of \"dummy\" phase for \"read-status\" operations."]
    #[inline(always)]
    pub fn slv_rdsta_dummy_en(&self) -> SLV_RDSTA_DUMMY_EN_R {
        SLV_RDSTA_DUMMY_EN_R::new(((self.bits >> 2) & 0x01) != 0)
    }
    #[doc = "Bit 1 - In the slave mode, it is the enable bit of \"dummy\" phase for \"write-buffer\" operations."]
    #[inline(always)]
    pub fn slv_wrbuf_dummy_en(&self) -> SLV_WRBUF_DUMMY_EN_R {
        SLV_WRBUF_DUMMY_EN_R::new(((self.bits >> 1) & 0x01) != 0)
    }
    #[doc = "Bit 0 - In the slave mode, it is the enable bit of \"dummy\" phase for \"read-buffer\" operations."]
    #[inline(always)]
    pub fn slv_rdbuf_dummy_en(&self) -> SLV_RDBUF_DUMMY_EN_R {
        SLV_RDBUF_DUMMY_EN_R::new((self.bits & 0x01) != 0)
    }
}
impl W {
    #[doc = "Bits 27:31 - In the slave mode, it is the length in bits for \"write-status\" and \"read-status\" operations. The register valueshall be (bit_num-1)"]
    #[inline(always)]
    pub fn slv_status_bitlen(&mut self) -> SLV_STATUS_BITLEN_W {
        SLV_STATUS_BITLEN_W { w: self }
    }
    #[doc = "Bits 16:24 - In the slave mode, it is the length in bits for \"write-buffer\" and \"read-buffer\" operations. The register value shallbe (bit_num-1)"]
    #[inline(always)]
    pub fn slv_buf_bitlen(&mut self) -> SLV_BUF_BITLEN_W {
        SLV_BUF_BITLEN_W { w: self }
    }
    #[doc = "Bits 10:15 - In the slave mode, it is the address length in bits for \"read-buffer\" operation. The register value shall be(bit_num-1)"]
    #[inline(always)]
    pub fn slv_rd_addr_bitlen(&mut self) -> SLV_RD_ADDR_BITLEN_W {
        SLV_RD_ADDR_BITLEN_W { w: self }
    }
    #[doc = "Bits 4:9 - In the slave mode, it is the address length in bits for \"write-buffer\" operation. The register value shall be(bit_num-1)"]
    #[inline(always)]
    pub fn slv_wr_addr_bitlen(&mut self) -> SLV_WR_ADDR_BITLEN_W {
        SLV_WR_ADDR_BITLEN_W { w: self }
    }
    #[doc = "Bit 3 - In the slave mode, it is the enable bit of \"dummy\" phase for \"write-status\" operations."]
    #[inline(always)]
    pub fn slv_wrsta_dummy_en(&mut self) -> SLV_WRSTA_DUMMY_EN_W {
        SLV_WRSTA_DUMMY_EN_W { w: self }
    }
    #[doc = "Bit 2 - In the slave mode, it is the enable bit of \"dummy\" phase for \"read-status\" operations."]
    #[inline(always)]
    pub fn slv_rdsta_dummy_en(&mut self) -> SLV_RDSTA_DUMMY_EN_W {
        SLV_RDSTA_DUMMY_EN_W { w: self }
    }
    #[doc = "Bit 1 - In the slave mode, it is the enable bit of \"dummy\" phase for \"write-buffer\" operations."]
    #[inline(always)]
    pub fn slv_wrbuf_dummy_en(&mut self) -> SLV_WRBUF_DUMMY_EN_W {
        SLV_WRBUF_DUMMY_EN_W { w: self }
    }
    #[doc = "Bit 0 - In the slave mode, it is the enable bit of \"dummy\" phase for \"read-buffer\" operations."]
    #[inline(always)]
    pub fn slv_rdbuf_dummy_en(&mut self) -> SLV_RDBUF_DUMMY_EN_W {
        SLV_RDBUF_DUMMY_EN_W { w: self }
    }
}