esp32s3/i2s1/
rx_clkm_div_conf.rs

1#[doc = "Register `RX_CLKM_DIV_CONF` reader"]
2pub type R = crate::R<RX_CLKM_DIV_CONF_SPEC>;
3#[doc = "Register `RX_CLKM_DIV_CONF` writer"]
4pub type W = crate::W<RX_CLKM_DIV_CONF_SPEC>;
5#[doc = "Field `RX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."]
6pub type RX_CLKM_DIV_Z_R = crate::FieldReader<u16>;
7#[doc = "Field `RX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."]
8pub type RX_CLKM_DIV_Z_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
9#[doc = "Field `RX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."]
10pub type RX_CLKM_DIV_Y_R = crate::FieldReader<u16>;
11#[doc = "Field `RX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."]
12pub type RX_CLKM_DIV_Y_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
13#[doc = "Field `RX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."]
14pub type RX_CLKM_DIV_X_R = crate::FieldReader<u16>;
15#[doc = "Field `RX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."]
16pub type RX_CLKM_DIV_X_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
17#[doc = "Field `RX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."]
18pub type RX_CLKM_DIV_YN1_R = crate::BitReader;
19#[doc = "Field `RX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."]
20pub type RX_CLKM_DIV_YN1_W<'a, REG> = crate::BitWriter<'a, REG>;
21impl R {
22    #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."]
23    #[inline(always)]
24    pub fn rx_clkm_div_z(&self) -> RX_CLKM_DIV_Z_R {
25        RX_CLKM_DIV_Z_R::new((self.bits & 0x01ff) as u16)
26    }
27    #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."]
28    #[inline(always)]
29    pub fn rx_clkm_div_y(&self) -> RX_CLKM_DIV_Y_R {
30        RX_CLKM_DIV_Y_R::new(((self.bits >> 9) & 0x01ff) as u16)
31    }
32    #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."]
33    #[inline(always)]
34    pub fn rx_clkm_div_x(&self) -> RX_CLKM_DIV_X_R {
35        RX_CLKM_DIV_X_R::new(((self.bits >> 18) & 0x01ff) as u16)
36    }
37    #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."]
38    #[inline(always)]
39    pub fn rx_clkm_div_yn1(&self) -> RX_CLKM_DIV_YN1_R {
40        RX_CLKM_DIV_YN1_R::new(((self.bits >> 27) & 1) != 0)
41    }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("RX_CLKM_DIV_CONF")
47            .field("rx_clkm_div_z", &self.rx_clkm_div_z())
48            .field("rx_clkm_div_y", &self.rx_clkm_div_y())
49            .field("rx_clkm_div_x", &self.rx_clkm_div_x())
50            .field("rx_clkm_div_yn1", &self.rx_clkm_div_yn1())
51            .finish()
52    }
53}
54impl W {
55    #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."]
56    #[inline(always)]
57    pub fn rx_clkm_div_z(&mut self) -> RX_CLKM_DIV_Z_W<RX_CLKM_DIV_CONF_SPEC> {
58        RX_CLKM_DIV_Z_W::new(self, 0)
59    }
60    #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."]
61    #[inline(always)]
62    pub fn rx_clkm_div_y(&mut self) -> RX_CLKM_DIV_Y_W<RX_CLKM_DIV_CONF_SPEC> {
63        RX_CLKM_DIV_Y_W::new(self, 9)
64    }
65    #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."]
66    #[inline(always)]
67    pub fn rx_clkm_div_x(&mut self) -> RX_CLKM_DIV_X_W<RX_CLKM_DIV_CONF_SPEC> {
68        RX_CLKM_DIV_X_W::new(self, 18)
69    }
70    #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."]
71    #[inline(always)]
72    pub fn rx_clkm_div_yn1(&mut self) -> RX_CLKM_DIV_YN1_W<RX_CLKM_DIV_CONF_SPEC> {
73        RX_CLKM_DIV_YN1_W::new(self, 27)
74    }
75}
76#[doc = "I2S RX module clock divider configure register\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_clkm_div_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rx_clkm_div_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct RX_CLKM_DIV_CONF_SPEC;
78impl crate::RegisterSpec for RX_CLKM_DIV_CONF_SPEC {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`rx_clkm_div_conf::R`](R) reader structure"]
82impl crate::Readable for RX_CLKM_DIV_CONF_SPEC {}
83#[doc = "`write(|w| ..)` method takes [`rx_clkm_div_conf::W`](W) writer structure"]
84impl crate::Writable for RX_CLKM_DIV_CONF_SPEC {
85    type Safety = crate::Unsafe;
86}
87#[doc = "`reset()` method sets RX_CLKM_DIV_CONF to value 0x0200"]
88impl crate::Resettable for RX_CLKM_DIV_CONF_SPEC {
89    const RESET_VALUE: u32 = 0x0200;
90}
esp32s3/i2s1/rx_clkm_div_conf.rs

esp32s3/i2s1/
rx_clkm_div_conf.rs
