esp32s3/extmem/
dcache_autoload_ctrl.rs

1#[doc = "Register `DCACHE_AUTOLOAD_CTRL` reader"]
2pub type R = crate::R<DCACHE_AUTOLOAD_CTRL_SPEC>;
3#[doc = "Register `DCACHE_AUTOLOAD_CTRL` writer"]
4pub type W = crate::W<DCACHE_AUTOLOAD_CTRL_SPEC>;
5#[doc = "Field `DCACHE_AUTOLOAD_SCT0_ENA` reader - The bits are used to enable the first section for autoload operation."]
6pub type DCACHE_AUTOLOAD_SCT0_ENA_R = crate::BitReader;
7#[doc = "Field `DCACHE_AUTOLOAD_SCT0_ENA` writer - The bits are used to enable the first section for autoload operation."]
8pub type DCACHE_AUTOLOAD_SCT0_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `DCACHE_AUTOLOAD_SCT1_ENA` reader - The bits are used to enable the second section for autoload operation."]
10pub type DCACHE_AUTOLOAD_SCT1_ENA_R = crate::BitReader;
11#[doc = "Field `DCACHE_AUTOLOAD_SCT1_ENA` writer - The bits are used to enable the second section for autoload operation."]
12pub type DCACHE_AUTOLOAD_SCT1_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `DCACHE_AUTOLOAD_ENA` reader - The bit is used to enable and disable autoload operation. It is combined with dcache_autoload_done. 1: enable, 0: disable."]
14pub type DCACHE_AUTOLOAD_ENA_R = crate::BitReader;
15#[doc = "Field `DCACHE_AUTOLOAD_ENA` writer - The bit is used to enable and disable autoload operation. It is combined with dcache_autoload_done. 1: enable, 0: disable."]
16pub type DCACHE_AUTOLOAD_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `DCACHE_AUTOLOAD_DONE` reader - The bit is used to indicate autoload operation is finished."]
18pub type DCACHE_AUTOLOAD_DONE_R = crate::BitReader;
19#[doc = "Field `DCACHE_AUTOLOAD_ORDER` reader - The bits are used to configure the direction of autoload. 1: descending, 0: ascending."]
20pub type DCACHE_AUTOLOAD_ORDER_R = crate::BitReader;
21#[doc = "Field `DCACHE_AUTOLOAD_ORDER` writer - The bits are used to configure the direction of autoload. 1: descending, 0: ascending."]
22pub type DCACHE_AUTOLOAD_ORDER_W<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `DCACHE_AUTOLOAD_RQST` reader - The bits are used to configure trigger conditions for autoload. 0/3: cache miss, 1: cache hit, 2: both cache miss and hit."]
24pub type DCACHE_AUTOLOAD_RQST_R = crate::FieldReader;
25#[doc = "Field `DCACHE_AUTOLOAD_RQST` writer - The bits are used to configure trigger conditions for autoload. 0/3: cache miss, 1: cache hit, 2: both cache miss and hit."]
26pub type DCACHE_AUTOLOAD_RQST_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
27#[doc = "Field `DCACHE_AUTOLOAD_SIZE` reader - The bits are used to configure the numbers of the cache block for the issuing autoload operation."]
28pub type DCACHE_AUTOLOAD_SIZE_R = crate::FieldReader;
29#[doc = "Field `DCACHE_AUTOLOAD_SIZE` writer - The bits are used to configure the numbers of the cache block for the issuing autoload operation."]
30pub type DCACHE_AUTOLOAD_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
31#[doc = "Field `DCACHE_AUTOLOAD_BUFFER_CLEAR` reader - The bit is used to clear autoload buffer in dcache."]
32pub type DCACHE_AUTOLOAD_BUFFER_CLEAR_R = crate::BitReader;
33#[doc = "Field `DCACHE_AUTOLOAD_BUFFER_CLEAR` writer - The bit is used to clear autoload buffer in dcache."]
34pub type DCACHE_AUTOLOAD_BUFFER_CLEAR_W<'a, REG> = crate::BitWriter<'a, REG>;
35impl R {
36    #[doc = "Bit 0 - The bits are used to enable the first section for autoload operation."]
37    #[inline(always)]
38    pub fn dcache_autoload_sct0_ena(&self) -> DCACHE_AUTOLOAD_SCT0_ENA_R {
39        DCACHE_AUTOLOAD_SCT0_ENA_R::new((self.bits & 1) != 0)
40    }
41    #[doc = "Bit 1 - The bits are used to enable the second section for autoload operation."]
42    #[inline(always)]
43    pub fn dcache_autoload_sct1_ena(&self) -> DCACHE_AUTOLOAD_SCT1_ENA_R {
44        DCACHE_AUTOLOAD_SCT1_ENA_R::new(((self.bits >> 1) & 1) != 0)
45    }
46    #[doc = "Bit 2 - The bit is used to enable and disable autoload operation. It is combined with dcache_autoload_done. 1: enable, 0: disable."]
47    #[inline(always)]
48    pub fn dcache_autoload_ena(&self) -> DCACHE_AUTOLOAD_ENA_R {
49        DCACHE_AUTOLOAD_ENA_R::new(((self.bits >> 2) & 1) != 0)
50    }
51    #[doc = "Bit 3 - The bit is used to indicate autoload operation is finished."]
52    #[inline(always)]
53    pub fn dcache_autoload_done(&self) -> DCACHE_AUTOLOAD_DONE_R {
54        DCACHE_AUTOLOAD_DONE_R::new(((self.bits >> 3) & 1) != 0)
55    }
56    #[doc = "Bit 4 - The bits are used to configure the direction of autoload. 1: descending, 0: ascending."]
57    #[inline(always)]
58    pub fn dcache_autoload_order(&self) -> DCACHE_AUTOLOAD_ORDER_R {
59        DCACHE_AUTOLOAD_ORDER_R::new(((self.bits >> 4) & 1) != 0)
60    }
61    #[doc = "Bits 5:6 - The bits are used to configure trigger conditions for autoload. 0/3: cache miss, 1: cache hit, 2: both cache miss and hit."]
62    #[inline(always)]
63    pub fn dcache_autoload_rqst(&self) -> DCACHE_AUTOLOAD_RQST_R {
64        DCACHE_AUTOLOAD_RQST_R::new(((self.bits >> 5) & 3) as u8)
65    }
66    #[doc = "Bits 7:8 - The bits are used to configure the numbers of the cache block for the issuing autoload operation."]
67    #[inline(always)]
68    pub fn dcache_autoload_size(&self) -> DCACHE_AUTOLOAD_SIZE_R {
69        DCACHE_AUTOLOAD_SIZE_R::new(((self.bits >> 7) & 3) as u8)
70    }
71    #[doc = "Bit 9 - The bit is used to clear autoload buffer in dcache."]
72    #[inline(always)]
73    pub fn dcache_autoload_buffer_clear(&self) -> DCACHE_AUTOLOAD_BUFFER_CLEAR_R {
74        DCACHE_AUTOLOAD_BUFFER_CLEAR_R::new(((self.bits >> 9) & 1) != 0)
75    }
76}
77#[cfg(feature = "impl-register-debug")]
78impl core::fmt::Debug for R {
79    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
80        f.debug_struct("DCACHE_AUTOLOAD_CTRL")
81            .field("dcache_autoload_sct0_ena", &self.dcache_autoload_sct0_ena())
82            .field("dcache_autoload_sct1_ena", &self.dcache_autoload_sct1_ena())
83            .field("dcache_autoload_ena", &self.dcache_autoload_ena())
84            .field("dcache_autoload_done", &self.dcache_autoload_done())
85            .field("dcache_autoload_order", &self.dcache_autoload_order())
86            .field("dcache_autoload_rqst", &self.dcache_autoload_rqst())
87            .field("dcache_autoload_size", &self.dcache_autoload_size())
88            .field(
89                "dcache_autoload_buffer_clear",
90                &self.dcache_autoload_buffer_clear(),
91            )
92            .finish()
93    }
94}
95impl W {
96    #[doc = "Bit 0 - The bits are used to enable the first section for autoload operation."]
97    #[inline(always)]
98    pub fn dcache_autoload_sct0_ena(
99        &mut self,
100    ) -> DCACHE_AUTOLOAD_SCT0_ENA_W<DCACHE_AUTOLOAD_CTRL_SPEC> {
101        DCACHE_AUTOLOAD_SCT0_ENA_W::new(self, 0)
102    }
103    #[doc = "Bit 1 - The bits are used to enable the second section for autoload operation."]
104    #[inline(always)]
105    pub fn dcache_autoload_sct1_ena(
106        &mut self,
107    ) -> DCACHE_AUTOLOAD_SCT1_ENA_W<DCACHE_AUTOLOAD_CTRL_SPEC> {
108        DCACHE_AUTOLOAD_SCT1_ENA_W::new(self, 1)
109    }
110    #[doc = "Bit 2 - The bit is used to enable and disable autoload operation. It is combined with dcache_autoload_done. 1: enable, 0: disable."]
111    #[inline(always)]
112    pub fn dcache_autoload_ena(&mut self) -> DCACHE_AUTOLOAD_ENA_W<DCACHE_AUTOLOAD_CTRL_SPEC> {
113        DCACHE_AUTOLOAD_ENA_W::new(self, 2)
114    }
115    #[doc = "Bit 4 - The bits are used to configure the direction of autoload. 1: descending, 0: ascending."]
116    #[inline(always)]
117    pub fn dcache_autoload_order(&mut self) -> DCACHE_AUTOLOAD_ORDER_W<DCACHE_AUTOLOAD_CTRL_SPEC> {
118        DCACHE_AUTOLOAD_ORDER_W::new(self, 4)
119    }
120    #[doc = "Bits 5:6 - The bits are used to configure trigger conditions for autoload. 0/3: cache miss, 1: cache hit, 2: both cache miss and hit."]
121    #[inline(always)]
122    pub fn dcache_autoload_rqst(&mut self) -> DCACHE_AUTOLOAD_RQST_W<DCACHE_AUTOLOAD_CTRL_SPEC> {
123        DCACHE_AUTOLOAD_RQST_W::new(self, 5)
124    }
125    #[doc = "Bits 7:8 - The bits are used to configure the numbers of the cache block for the issuing autoload operation."]
126    #[inline(always)]
127    pub fn dcache_autoload_size(&mut self) -> DCACHE_AUTOLOAD_SIZE_W<DCACHE_AUTOLOAD_CTRL_SPEC> {
128        DCACHE_AUTOLOAD_SIZE_W::new(self, 7)
129    }
130    #[doc = "Bit 9 - The bit is used to clear autoload buffer in dcache."]
131    #[inline(always)]
132    pub fn dcache_autoload_buffer_clear(
133        &mut self,
134    ) -> DCACHE_AUTOLOAD_BUFFER_CLEAR_W<DCACHE_AUTOLOAD_CTRL_SPEC> {
135        DCACHE_AUTOLOAD_BUFFER_CLEAR_W::new(self, 9)
136    }
137}
138#[doc = "******* Description ***********\n\nYou can [`read`](crate::Reg::read) this register and get [`dcache_autoload_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcache_autoload_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
139pub struct DCACHE_AUTOLOAD_CTRL_SPEC;
140impl crate::RegisterSpec for DCACHE_AUTOLOAD_CTRL_SPEC {
141    type Ux = u32;
142}
143#[doc = "`read()` method returns [`dcache_autoload_ctrl::R`](R) reader structure"]
144impl crate::Readable for DCACHE_AUTOLOAD_CTRL_SPEC {}
145#[doc = "`write(|w| ..)` method takes [`dcache_autoload_ctrl::W`](W) writer structure"]
146impl crate::Writable for DCACHE_AUTOLOAD_CTRL_SPEC {
147    type Safety = crate::Unsafe;
148}
149#[doc = "`reset()` method sets DCACHE_AUTOLOAD_CTRL to value 0x08"]
150impl crate::Resettable for DCACHE_AUTOLOAD_CTRL_SPEC {
151    const RESET_VALUE: u32 = 0x08;
152}
esp32s3/extmem/dcache_autoload_ctrl.rs

esp32s3/extmem/
dcache_autoload_ctrl.rs
