esp32s3/rtc_cntl/
time_update.rs

1#[doc = "Register `TIME_UPDATE` reader"]
2pub type R = crate::R<TIME_UPDATE_SPEC>;
3#[doc = "Register `TIME_UPDATE` writer"]
4pub type W = crate::W<TIME_UPDATE_SPEC>;
5#[doc = "Field `TIMER_SYS_STALL` reader - Enable to record system stall time"]
6pub type TIMER_SYS_STALL_R = crate::BitReader;
7#[doc = "Field `TIMER_SYS_STALL` writer - Enable to record system stall time"]
8pub type TIMER_SYS_STALL_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `TIMER_XTL_OFF` reader - Enable to record 40M XTAL OFF time"]
10pub type TIMER_XTL_OFF_R = crate::BitReader;
11#[doc = "Field `TIMER_XTL_OFF` writer - Enable to record 40M XTAL OFF time"]
12pub type TIMER_XTL_OFF_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `TIMER_SYS_RST` reader - enable to record system reset time"]
14pub type TIMER_SYS_RST_R = crate::BitReader;
15#[doc = "Field `TIMER_SYS_RST` writer - enable to record system reset time"]
16pub type TIMER_SYS_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `TIME_UPDATE` writer - Set 1: to update register with RTC timer"]
18pub type TIME_UPDATE_W<'a, REG> = crate::BitWriter<'a, REG>;
19impl R {
20    #[doc = "Bit 27 - Enable to record system stall time"]
21    #[inline(always)]
22    pub fn timer_sys_stall(&self) -> TIMER_SYS_STALL_R {
23        TIMER_SYS_STALL_R::new(((self.bits >> 27) & 1) != 0)
24    }
25    #[doc = "Bit 28 - Enable to record 40M XTAL OFF time"]
26    #[inline(always)]
27    pub fn timer_xtl_off(&self) -> TIMER_XTL_OFF_R {
28        TIMER_XTL_OFF_R::new(((self.bits >> 28) & 1) != 0)
29    }
30    #[doc = "Bit 29 - enable to record system reset time"]
31    #[inline(always)]
32    pub fn timer_sys_rst(&self) -> TIMER_SYS_RST_R {
33        TIMER_SYS_RST_R::new(((self.bits >> 29) & 1) != 0)
34    }
35}
36#[cfg(feature = "impl-register-debug")]
37impl core::fmt::Debug for R {
38    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
39        f.debug_struct("TIME_UPDATE")
40            .field("timer_sys_stall", &self.timer_sys_stall())
41            .field("timer_xtl_off", &self.timer_xtl_off())
42            .field("timer_sys_rst", &self.timer_sys_rst())
43            .finish()
44    }
45}
46impl W {
47    #[doc = "Bit 27 - Enable to record system stall time"]
48    #[inline(always)]
49    pub fn timer_sys_stall(&mut self) -> TIMER_SYS_STALL_W<TIME_UPDATE_SPEC> {
50        TIMER_SYS_STALL_W::new(self, 27)
51    }
52    #[doc = "Bit 28 - Enable to record 40M XTAL OFF time"]
53    #[inline(always)]
54    pub fn timer_xtl_off(&mut self) -> TIMER_XTL_OFF_W<TIME_UPDATE_SPEC> {
55        TIMER_XTL_OFF_W::new(self, 28)
56    }
57    #[doc = "Bit 29 - enable to record system reset time"]
58    #[inline(always)]
59    pub fn timer_sys_rst(&mut self) -> TIMER_SYS_RST_W<TIME_UPDATE_SPEC> {
60        TIMER_SYS_RST_W::new(self, 29)
61    }
62    #[doc = "Bit 31 - Set 1: to update register with RTC timer"]
63    #[inline(always)]
64    pub fn time_update(&mut self) -> TIME_UPDATE_W<TIME_UPDATE_SPEC> {
65        TIME_UPDATE_W::new(self, 31)
66    }
67}
68#[doc = "update rtc main timer\n\nYou can [`read`](crate::Reg::read) this register and get [`time_update::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`time_update::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
69pub struct TIME_UPDATE_SPEC;
70impl crate::RegisterSpec for TIME_UPDATE_SPEC {
71    type Ux = u32;
72}
73#[doc = "`read()` method returns [`time_update::R`](R) reader structure"]
74impl crate::Readable for TIME_UPDATE_SPEC {}
75#[doc = "`write(|w| ..)` method takes [`time_update::W`](W) writer structure"]
76impl crate::Writable for TIME_UPDATE_SPEC {
77    type Safety = crate::Unsafe;
78    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
79    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
80}
81#[doc = "`reset()` method sets TIME_UPDATE to value 0"]
82impl crate::Resettable for TIME_UPDATE_SPEC {
83    const RESET_VALUE: u32 = 0;
84}
esp32s3/rtc_cntl/time_update.rs

esp32s3/rtc_cntl/
time_update.rs
