1#[doc = "Register `STATUS` reader"]
2pub type R = crate::R<STATUS_SPEC>;
3#[doc = "Field `FIFO_RX_WATERMARK` reader - FIFO reached Receive watermark level, not qualified with data transfer."]
4pub type FIFO_RX_WATERMARK_R = crate::BitReader;
5#[doc = "Field `FIFO_TX_WATERMARK` reader - FIFO reached Transmit watermark level, not qualified with data transfer."]
6pub type FIFO_TX_WATERMARK_R = crate::BitReader;
7#[doc = "Field `FIFO_EMPTY` reader - FIFO is empty status."]
8pub type FIFO_EMPTY_R = crate::BitReader;
9#[doc = "Field `FIFO_FULL` reader - FIFO is full status."]
10pub type FIFO_FULL_R = crate::BitReader;
11#[doc = "Field `COMMAND_FSM_STATES` reader - Command FSM states. 0: Idle; 1: Send init sequence; 2: Send cmd start bit; 3: Send cmd tx bit; 4: Send cmd index + arg; 5: Send cmd crc7; 6: Send cmd end bit; 7: Receive resp start bit; 8: Receive resp IRQ response; 9: Receive resp tx bit; 10: Receive resp cmd idx; 11: Receive resp data; 12: Receive resp crc7; 13: Receive resp end bit; 14: Cmd path wait NCC; 15: Wait, cmd-to-response turnaround."]
12pub type COMMAND_FSM_STATES_R = crate::FieldReader;
13#[doc = "Field `DATA_3_STATUS` reader - Raw selected sdhost_card_data\\[3\\], checks whether card is present. 0: card not present; 1: card present."]
14pub type DATA_3_STATUS_R = crate::BitReader;
15#[doc = "Field `DATA_BUSY` reader - Inverted version of raw selected sdhost_card_data\\[0\\]. 0: Card data not busy; 1: Card data busy."]
16pub type DATA_BUSY_R = crate::BitReader;
17#[doc = "Field `DATA_STATE_MC_BUSY` reader - Data transmit or receive state-machine is busy."]
18pub type DATA_STATE_MC_BUSY_R = crate::BitReader;
19#[doc = "Field `RESPONSE_INDEX` reader - Index of previous response, including any auto-stop sent by core."]
20pub type RESPONSE_INDEX_R = crate::FieldReader;
21#[doc = "Field `FIFO_COUNT` reader - FIFO count, number of filled locations in FIFO."]
22pub type FIFO_COUNT_R = crate::FieldReader<u16>;
23impl R {
24 #[doc = "Bit 0 - FIFO reached Receive watermark level, not qualified with data transfer."]
25 #[inline(always)]
26 pub fn fifo_rx_watermark(&self) -> FIFO_RX_WATERMARK_R {
27 FIFO_RX_WATERMARK_R::new((self.bits & 1) != 0)
28 }
29 #[doc = "Bit 1 - FIFO reached Transmit watermark level, not qualified with data transfer."]
30 #[inline(always)]
31 pub fn fifo_tx_watermark(&self) -> FIFO_TX_WATERMARK_R {
32 FIFO_TX_WATERMARK_R::new(((self.bits >> 1) & 1) != 0)
33 }
34 #[doc = "Bit 2 - FIFO is empty status."]
35 #[inline(always)]
36 pub fn fifo_empty(&self) -> FIFO_EMPTY_R {
37 FIFO_EMPTY_R::new(((self.bits >> 2) & 1) != 0)
38 }
39 #[doc = "Bit 3 - FIFO is full status."]
40 #[inline(always)]
41 pub fn fifo_full(&self) -> FIFO_FULL_R {
42 FIFO_FULL_R::new(((self.bits >> 3) & 1) != 0)
43 }
44 #[doc = "Bits 4:7 - Command FSM states. 0: Idle; 1: Send init sequence; 2: Send cmd start bit; 3: Send cmd tx bit; 4: Send cmd index + arg; 5: Send cmd crc7; 6: Send cmd end bit; 7: Receive resp start bit; 8: Receive resp IRQ response; 9: Receive resp tx bit; 10: Receive resp cmd idx; 11: Receive resp data; 12: Receive resp crc7; 13: Receive resp end bit; 14: Cmd path wait NCC; 15: Wait, cmd-to-response turnaround."]
45 #[inline(always)]
46 pub fn command_fsm_states(&self) -> COMMAND_FSM_STATES_R {
47 COMMAND_FSM_STATES_R::new(((self.bits >> 4) & 0x0f) as u8)
48 }
49 #[doc = "Bit 8 - Raw selected sdhost_card_data\\[3\\], checks whether card is present. 0: card not present; 1: card present."]
50 #[inline(always)]
51 pub fn data_3_status(&self) -> DATA_3_STATUS_R {
52 DATA_3_STATUS_R::new(((self.bits >> 8) & 1) != 0)
53 }
54 #[doc = "Bit 9 - Inverted version of raw selected sdhost_card_data\\[0\\]. 0: Card data not busy; 1: Card data busy."]
55 #[inline(always)]
56 pub fn data_busy(&self) -> DATA_BUSY_R {
57 DATA_BUSY_R::new(((self.bits >> 9) & 1) != 0)
58 }
59 #[doc = "Bit 10 - Data transmit or receive state-machine is busy."]
60 #[inline(always)]
61 pub fn data_state_mc_busy(&self) -> DATA_STATE_MC_BUSY_R {
62 DATA_STATE_MC_BUSY_R::new(((self.bits >> 10) & 1) != 0)
63 }
64 #[doc = "Bits 11:16 - Index of previous response, including any auto-stop sent by core."]
65 #[inline(always)]
66 pub fn response_index(&self) -> RESPONSE_INDEX_R {
67 RESPONSE_INDEX_R::new(((self.bits >> 11) & 0x3f) as u8)
68 }
69 #[doc = "Bits 17:29 - FIFO count, number of filled locations in FIFO."]
70 #[inline(always)]
71 pub fn fifo_count(&self) -> FIFO_COUNT_R {
72 FIFO_COUNT_R::new(((self.bits >> 17) & 0x1fff) as u16)
73 }
74}
75#[cfg(feature = "impl-register-debug")]
76impl core::fmt::Debug for R {
77 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
78 f.debug_struct("STATUS")
79 .field("fifo_rx_watermark", &self.fifo_rx_watermark())
80 .field("fifo_tx_watermark", &self.fifo_tx_watermark())
81 .field("fifo_empty", &self.fifo_empty())
82 .field("fifo_full", &self.fifo_full())
83 .field("command_fsm_states", &self.command_fsm_states())
84 .field("data_3_status", &self.data_3_status())
85 .field("data_busy", &self.data_busy())
86 .field("data_state_mc_busy", &self.data_state_mc_busy())
87 .field("response_index", &self.response_index())
88 .field("fifo_count", &self.fifo_count())
89 .finish()
90 }
91}
92#[doc = "SD/MMC status register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
93pub struct STATUS_SPEC;
94impl crate::RegisterSpec for STATUS_SPEC {
95 type Ux = u32;
96}
97#[doc = "`read()` method returns [`status::R`](R) reader structure"]
98impl crate::Readable for STATUS_SPEC {}
99#[doc = "`reset()` method sets STATUS to value 0x0716"]
100impl crate::Resettable for STATUS_SPEC {
101 const RESET_VALUE: u32 = 0x0716;
102}