Expand description
SENSITIVE Peripheral
Modules§
- apb_
peripheral_ access_ 0 - APB peripheral configuration register 0.
- apb_
peripheral_ access_ 1 - APB peripheral configuration register 1.
- backup_
bus_ pms_ constrain_ 0 - BackUp access peripherals permission configuration register 0.
- backup_
bus_ pms_ constrain_ 1 - BackUp access peripherals permission configuration register 1.
- backup_
bus_ pms_ constrain_ 2 - BackUp access peripherals permission configuration register 2.
- backup_
bus_ pms_ constrain_ 3 - BackUp access peripherals permission configuration register 3.
- backup_
bus_ pms_ constrain_ 4 - BackUp access peripherals permission configuration register 4.
- backup_
bus_ pms_ constrain_ 5 - BackUp access peripherals permission configuration register 5.
- backup_
bus_ pms_ constrain_ 6 - BackUp access peripherals permission configuration register 6.
- backup_
bus_ pms_ monitor_ 0 - BackUp permission report register 0.
- backup_
bus_ pms_ monitor_ 1 - BackUp permission report register 1.
- backup_
bus_ pms_ monitor_ 2 - BackUp permission report register 2.
- backup_
bus_ pms_ monitor_ 3 - BackUp permission report register 3.
- cache_
dataarray_ connect_ 0 - Cache data array configuration register 0.
- cache_
dataarray_ connect_ 1 - Cache data array configuration register 1.
- cache_
mmu_ access_ 0 - Cache MMU configuration register 0.
- cache_
mmu_ access_ 1 - Cache MMU configuration register 1.
- cache_
tag_ access_ 0 - Cache tag configuration register 0.
- cache_
tag_ access_ 1 - Cache tag configuration register 1.
- clock_
gate - Sensitive module clock gate configuration register.
- core_
0_ dram0_ pms_ monitor_ 0 - core0 dram0 permission monitor configuration register 0
- core_
0_ dram0_ pms_ monitor_ 1 - core0 dram0 permission monitor configuration register 1
- core_
0_ dram0_ pms_ monitor_ 2 - core0 dram0 permission monitor configuration register 2.
- core_
0_ dram0_ pms_ monitor_ 3 - core0 dram0 permission monitor configuration register 3.
- core_
0_ iram0_ pms_ monitor_ 0 - core0 iram0 permission monitor configuration register 0
- core_
0_ iram0_ pms_ monitor_ 1 - core0 iram0 permission monitor configuration register 1
- core_
0_ iram0_ pms_ monitor_ 2 - core0 iram0 permission monitor configuration register 2
- core_
0_ pif_ pms_ constrain_ 0 - Core0 access peripherals permission configuration register 0.
- core_
0_ pif_ pms_ constrain_ 1 - Core0 access peripherals permission configuration register 1.
- core_
0_ pif_ pms_ constrain_ 2 - Core0 access peripherals permission configuration register 2.
- core_
0_ pif_ pms_ constrain_ 3 - Core0 access peripherals permission configuration register 3.
- core_
0_ pif_ pms_ constrain_ 4 - Core0 access peripherals permission configuration register 4.
- core_
0_ pif_ pms_ constrain_ 5 - Core0 access peripherals permission configuration register 5.
- core_
0_ pif_ pms_ constrain_ 6 - Core0 access peripherals permission configuration register 6.
- core_
0_ pif_ pms_ constrain_ 7 - Core0 access peripherals permission configuration register 7.
- core_
0_ pif_ pms_ constrain_ 8 - Core0 access peripherals permission configuration register 8.
- core_
0_ pif_ pms_ constrain_ 9 - Core0 access peripherals permission configuration register 9.
- core_
0_ pif_ pms_ constrain_ 10 - Core0 access peripherals permission configuration register 10.
- core_
0_ pif_ pms_ constrain_ 11 - Core0 access peripherals permission configuration register 11.
- core_
0_ pif_ pms_ constrain_ 12 - Core0 access peripherals permission configuration register 12.
- core_
0_ pif_ pms_ constrain_ 13 - Core0 access peripherals permission configuration register 13.
- core_
0_ pif_ pms_ constrain_ 14 - Core0 access peripherals permission configuration register 14.
- core_
0_ pif_ pms_ monitor_ 0 - Core0 permission report register 0.
- core_
0_ pif_ pms_ monitor_ 1 - Core0 permission report register 1.
- core_
0_ pif_ pms_ monitor_ 2 - Core0 permission report register 2.
- core_
0_ pif_ pms_ monitor_ 3 - Core0 permission report register 3.
- core_
0_ pif_ pms_ monitor_ 4 - Core0 permission report register 4.
- core_
0_ pif_ pms_ monitor_ 5 - Core0 permission report register 5.
- core_
0_ pif_ pms_ monitor_ 6 - Core0 permission report register 6.
- core_
0_ region_ pms_ constrain_ 0 - Core0 region permission register 0.
- core_
0_ region_ pms_ constrain_ 1 - Core0 region permission register 1.
- core_
0_ region_ pms_ constrain_ 2 - Core0 region permission register 2.
- core_
0_ region_ pms_ constrain_ 3 - Core0 region permission register 3.
- core_
0_ region_ pms_ constrain_ 4 - Core0 region permission register 4.
- core_
0_ region_ pms_ constrain_ 5 - Core0 region permission register 5.
- core_
0_ region_ pms_ constrain_ 6 - Core0 region permission register 6.
- core_
0_ region_ pms_ constrain_ 7 - Core0 region permission register 7.
- core_
0_ region_ pms_ constrain_ 8 - Core0 region permission register 8.
- core_
0_ region_ pms_ constrain_ 9 - Core0 region permission register 9.
- core_
0_ region_ pms_ constrain_ 10 - Core0 region permission register 10.
- core_
0_ region_ pms_ constrain_ 11 - Core0 region permission register 11.
- core_
0_ region_ pms_ constrain_ 12 - Core0 region permission register 12.
- core_
0_ region_ pms_ constrain_ 13 - Core0 region permission register 13.
- core_
0_ region_ pms_ constrain_ 14 - Core0 region permission register 14.
- core_
0_ toomanyexceptions_ m_ override_ 0 - core0 toomanyexception override configuration register 0.
- core_
0_ toomanyexceptions_ m_ override_ 1 - core0 toomanyexception override configuration register 1.
- core_
0_ vecbase_ override_ 0 - core0 vecbase override configuration register 0
- core_
0_ vecbase_ override_ 1 - core0 vecbase override configuration register 1
- core_
0_ vecbase_ override_ 2 - core0 vecbase override configuration register 1
- core_
0_ vecbase_ override_ lock - core0 vecbase override configuration register 0
- core_
1_ dram0_ pms_ monitor_ 0 - core1 dram0 permission monitor configuration register 0
- core_
1_ dram0_ pms_ monitor_ 1 - core1 dram0 permission monitor configuration register 1
- core_
1_ dram0_ pms_ monitor_ 2 - core1 dram0 permission monitor configuration register 2.
- core_
1_ dram0_ pms_ monitor_ 3 - core1 dram0 permission monitor configuration register 3.
- core_
1_ iram0_ pms_ monitor_ 0 - core1 iram0 permission monitor configuration register 0
- core_
1_ iram0_ pms_ monitor_ 1 - core1 iram0 permission monitor configuration register 1
- core_
1_ iram0_ pms_ monitor_ 2 - core1 iram0 permission monitor configuration register 2
- core_
1_ pif_ pms_ constrain_ 0 - Core1 access peripherals permission configuration register 0.
- core_
1_ pif_ pms_ constrain_ 1 - Core1 access peripherals permission configuration register 1.
- core_
1_ pif_ pms_ constrain_ 2 - Core1 access peripherals permission configuration register 2.
- core_
1_ pif_ pms_ constrain_ 3 - Core1 access peripherals permission configuration register 3.
- core_
1_ pif_ pms_ constrain_ 4 - Core1 access peripherals permission configuration register 4.
- core_
1_ pif_ pms_ constrain_ 5 - Core1 access peripherals permission configuration register 5.
- core_
1_ pif_ pms_ constrain_ 6 - Core1 access peripherals permission configuration register 6.
- core_
1_ pif_ pms_ constrain_ 7 - Core1 access peripherals permission configuration register 7.
- core_
1_ pif_ pms_ constrain_ 8 - Core1 access peripherals permission configuration register 8.
- core_
1_ pif_ pms_ constrain_ 9 - Core1 access peripherals permission configuration register 9.
- core_
1_ pif_ pms_ constrain_ 10 - core1 access peripherals permission configuration register 10.
- core_
1_ pif_ pms_ constrain_ 11 - core1 access peripherals permission configuration register 11.
- core_
1_ pif_ pms_ constrain_ 12 - core1 access peripherals permission configuration register 12.
- core_
1_ pif_ pms_ constrain_ 13 - core1 access peripherals permission configuration register 13.
- core_
1_ pif_ pms_ constrain_ 14 - core1 access peripherals permission configuration register 14.
- core_
1_ pif_ pms_ monitor_ 0 - core1 permission report register 0.
- core_
1_ pif_ pms_ monitor_ 1 - core1 permission report register 1.
- core_
1_ pif_ pms_ monitor_ 2 - core1 permission report register 2.
- core_
1_ pif_ pms_ monitor_ 3 - core1 permission report register 3.
- core_
1_ pif_ pms_ monitor_ 4 - core1 permission report register 4.
- core_
1_ pif_ pms_ monitor_ 5 - core1 permission report register 5.
- core_
1_ pif_ pms_ monitor_ 6 - core1 permission report register 6.
- core_
1_ region_ pms_ constrain_ 0 - core1 region permission register 0.
- core_
1_ region_ pms_ constrain_ 1 - core1 region permission register 1.
- core_
1_ region_ pms_ constrain_ 2 - core1 region permission register 2.
- core_
1_ region_ pms_ constrain_ 3 - core1 region permission register 3.
- core_
1_ region_ pms_ constrain_ 4 - core1 region permission register 4.
- core_
1_ region_ pms_ constrain_ 5 - core1 region permission register 5.
- core_
1_ region_ pms_ constrain_ 6 - core1 region permission register 6.
- core_
1_ region_ pms_ constrain_ 7 - core1 region permission register 7.
- core_
1_ region_ pms_ constrain_ 8 - core1 region permission register 8.
- core_
1_ region_ pms_ constrain_ 9 - core1 region permission register 9.
- core_
1_ region_ pms_ constrain_ 10 - core1 region permission register 10.
- core_
1_ region_ pms_ constrain_ 11 - core1 region permission register 11.
- core_
1_ region_ pms_ constrain_ 12 - core1 region permission register 12.
- core_
1_ region_ pms_ constrain_ 13 - core1 region permission register 13.
- core_
1_ region_ pms_ constrain_ 14 - core1 region permission register 14.
- core_
1_ toomanyexceptions_ m_ override_ 0 - core1 toomanyexception override configuration register 0.
- core_
1_ toomanyexceptions_ m_ override_ 1 - core1 toomanyexception override configuration register 1.
- core_
1_ vecbase_ override_ 0 - core1 vecbase override configuration register 0
- core_
1_ vecbase_ override_ 1 - core1 vecbase override configuration register 1
- core_
1_ vecbase_ override_ 2 - core1 vecbase override configuration register 1
- core_
1_ vecbase_ override_ lock - core1 vecbase override configuration register 0
- core_
x_ dram0_ pms_ constrain_ 0 - corex dram0 permission configuration register 0
- core_
x_ dram0_ pms_ constrain_ 1 - corex dram0 permission configuration register 1
- core_
x_ iram0_ dram0_ dma_ split_ line_ constrain_ 0 - sram split line configuration register 0
- core_
x_ iram0_ dram0_ dma_ split_ line_ constrain_ 1 - sram split line configuration register 1
- core_
x_ iram0_ dram0_ dma_ split_ line_ constrain_ 2 - sram split line configuration register 1
- core_
x_ iram0_ dram0_ dma_ split_ line_ constrain_ 3 - sram split line configuration register 1
- core_
x_ iram0_ dram0_ dma_ split_ line_ constrain_ 4 - sram split line configuration register 1
- core_
x_ iram0_ dram0_ dma_ split_ line_ constrain_ 5 - sram split line configuration register 1
- core_
x_ iram0_ pms_ constrain_ 0 - corex iram0 permission configuration register 0
- core_
x_ iram0_ pms_ constrain_ 1 - corex iram0 permission configuration register 0
- core_
x_ iram0_ pms_ constrain_ 2 - corex iram0 permission configuration register 1
- date
- Sensitive version register.
- dma_
apbperi_ adc_ dac_ pms_ constrain_ 0 - adc_dac dma permission configuration register 0.
- dma_
apbperi_ adc_ dac_ pms_ constrain_ 1 - adc_dac dma permission configuration register 1.
- dma_
apbperi_ aes_ pms_ constrain_ 0 - aes dma permission configuration register 0.
- dma_
apbperi_ aes_ pms_ constrain_ 1 - aes dma permission configuration register 1.
- dma_
apbperi_ backup_ pms_ constrain_ 0 - backup dma permission configuration register 0.
- dma_
apbperi_ backup_ pms_ constrain_ 1 - backup dma permission configuration register 1.
- dma_
apbperi_ i2s0_ pms_ constrain_ 0 - i2s0 dma permission configuration register 0.
- dma_
apbperi_ i2s0_ pms_ constrain_ 1 - i2s0 dma permission configuration register 1.
- dma_
apbperi_ i2s1_ pms_ constrain_ 0 - i2s1 dma permission configuration register 0.
- dma_
apbperi_ i2s1_ pms_ constrain_ 1 - i2s1 dma permission configuration register 1.
- dma_
apbperi_ lc_ pms_ constrain_ 0 - lc dma permission configuration register 0.
- dma_
apbperi_ lc_ pms_ constrain_ 1 - lc dma permission configuration register 1.
- dma_
apbperi_ lcd_ cam_ pms_ constrain_ 0 - lcd_cam dma permission configuration register 0.
- dma_
apbperi_ lcd_ cam_ pms_ constrain_ 1 - lcd_cam dma permission configuration register 1.
- dma_
apbperi_ mac_ pms_ constrain_ 0 - mac dma permission configuration register 0.
- dma_
apbperi_ mac_ pms_ constrain_ 1 - mac dma permission configuration register 1.
- dma_
apbperi_ pms_ monitor_ 0 - dma permission monitor configuration register 0.
- dma_
apbperi_ pms_ monitor_ 1 - dma permission monitor configuration register 1.
- dma_
apbperi_ pms_ monitor_ 2 - dma permission monitor configuration register 2.
- dma_
apbperi_ pms_ monitor_ 3 - dma permission monitor configuration register 3.
- dma_
apbperi_ rmt_ pms_ constrain_ 0 - rmt dma permission configuration register 0.
- dma_
apbperi_ rmt_ pms_ constrain_ 1 - rmt dma permission configuration register 1.
- dma_
apbperi_ sdio_ pms_ constrain_ 0 - sdio dma permission configuration register 0.
- dma_
apbperi_ sdio_ pms_ constrain_ 1 - sdio dma permission configuration register 1.
- dma_
apbperi_ sha_ pms_ constrain_ 0 - sha dma permission configuration register 0.
- dma_
apbperi_ sha_ pms_ constrain_ 1 - sha dma permission configuration register 1.
- dma_
apbperi_ spi2_ pms_ constrain_ 0 - spi2 dma permission configuration register 0.
- dma_
apbperi_ spi2_ pms_ constrain_ 1 - spi2 dma permission configuration register 1.
- dma_
apbperi_ spi3_ pms_ constrain_ 0 - spi3 dma permission configuration register 0.
- dma_
apbperi_ spi3_ pms_ constrain_ 1 - spi3 dma permission configuration register 1.
- dma_
apbperi_ uhci0_ pms_ constrain_ 0 - uhci0 dma permission configuration register 0.
- dma_
apbperi_ uhci0_ pms_ constrain_ 1 - uhci0 dma permission configuration register 1.
- dma_
apbperi_ usb_ pms_ constrain_ 0 - usb dma permission configuration register 0.
- dma_
apbperi_ usb_ pms_ constrain_ 1 - usb dma permission configuration register 1.
- edma_
boundary_ 0 - EDMA boundary 0 configuration
- edma_
boundary_ 1 - EDMA boundary 1 configuration
- edma_
boundary_ 2 - EDMA boundary 2 configuration
- edma_
boundary_ lock - EDMA boundary lock register.
- edma_
pms_ adc_ dac - EDMA-ADC/DAC permission control register.
- edma_
pms_ adc_ dac_ lock - EDMA-ADC/DAC permission lock register.
- edma_
pms_ aes - EDMA-AES permission control register.
- edma_
pms_ aes_ lock - EDMA-AES permission lock register.
- edma_
pms_ i2s0 - EDMA-I2S0 permission control register.
- edma_
pms_ i2s0_ lock - EDMA-I2S0 permission lock register.
- edma_
pms_ i2s1 - EDMA-I2S1 permission control register.
- edma_
pms_ i2s1_ lock - EDMA-I2S1 permission lock register.
- edma_
pms_ lcd_ cam - EDMA-LCD/CAM permission control register.
- edma_
pms_ lcd_ cam_ lock - EDMA-LCD/CAM permission lock register.
- edma_
pms_ rmt - EDMA-RMT permission control register.
- edma_
pms_ rmt_ lock - EDMA-RMT permission lock register.
- edma_
pms_ sha - EDMA-SHA permission control register.
- edma_
pms_ sha_ lock - EDMA-SHA permission lock register.
- edma_
pms_ spi2 - EDMA-SPI2 permission control register.
- edma_
pms_ spi3 - EDMA-SPI3 permission control register.
- edma_
pms_ spi2_ lock - EDMA-SPI2 permission lock register.
- edma_
pms_ spi3_ lock - EDMA-SPI3 permission lock register.
- edma_
pms_ uhci0 - EDMA-UHCI0 permission control register.
- edma_
pms_ uhci0_ lock - EDMA-UHCI0 permission lock register.
- internal_
sram_ usage_ 0 - Internal SRAM configuration register 0.
- internal_
sram_ usage_ 1 - Internal SRAM configuration register 1.
- internal_
sram_ usage_ 2 - Internal SRAM configuration register 2.
- internal_
sram_ usage_ 3 - Internal SRAM configuration register 3.
- internal_
sram_ usage_ 4 - Internal SRAM configuration register 4.
- retention_
disable - Retention configuration register.
- rtc_pms
- RTC coprocessor permission register.
Structs§
- Register
Block - Register block
Type Aliases§
- APB_
PERIPHERAL_ ACCESS_ 0 - APB_PERIPHERAL_ACCESS_0 (rw) register accessor: APB peripheral configuration register 0.
- APB_
PERIPHERAL_ ACCESS_ 1 - APB_PERIPHERAL_ACCESS_1 (rw) register accessor: APB peripheral configuration register 1.
- BACKUP_
BUS_ PMS_ CONSTRAIN_ 0 - BACKUP_BUS_PMS_CONSTRAIN_0 (rw) register accessor: BackUp access peripherals permission configuration register 0.
- BACKUP_
BUS_ PMS_ CONSTRAIN_ 1 - BACKUP_BUS_PMS_CONSTRAIN_1 (rw) register accessor: BackUp access peripherals permission configuration register 1.
- BACKUP_
BUS_ PMS_ CONSTRAIN_ 2 - BACKUP_BUS_PMS_CONSTRAIN_2 (rw) register accessor: BackUp access peripherals permission configuration register 2.
- BACKUP_
BUS_ PMS_ CONSTRAIN_ 3 - BACKUP_BUS_PMS_CONSTRAIN_3 (rw) register accessor: BackUp access peripherals permission configuration register 3.
- BACKUP_
BUS_ PMS_ CONSTRAIN_ 4 - BACKUP_BUS_PMS_CONSTRAIN_4 (rw) register accessor: BackUp access peripherals permission configuration register 4.
- BACKUP_
BUS_ PMS_ CONSTRAIN_ 5 - BACKUP_BUS_PMS_CONSTRAIN_5 (rw) register accessor: BackUp access peripherals permission configuration register 5.
- BACKUP_
BUS_ PMS_ CONSTRAIN_ 6 - BACKUP_BUS_PMS_CONSTRAIN_6 (rw) register accessor: BackUp access peripherals permission configuration register 6.
- BACKUP_
BUS_ PMS_ MONITOR_ 0 - BACKUP_BUS_PMS_MONITOR_0 (rw) register accessor: BackUp permission report register 0.
- BACKUP_
BUS_ PMS_ MONITOR_ 1 - BACKUP_BUS_PMS_MONITOR_1 (rw) register accessor: BackUp permission report register 1.
- BACKUP_
BUS_ PMS_ MONITOR_ 2 - BACKUP_BUS_PMS_MONITOR_2 (r) register accessor: BackUp permission report register 2.
- BACKUP_
BUS_ PMS_ MONITOR_ 3 - BACKUP_BUS_PMS_MONITOR_3 (r) register accessor: BackUp permission report register 3.
- CACHE_
DATAARRAY_ CONNECT_ 0 - CACHE_DATAARRAY_CONNECT_0 (rw) register accessor: Cache data array configuration register 0.
- CACHE_
DATAARRAY_ CONNECT_ 1 - CACHE_DATAARRAY_CONNECT_1 (rw) register accessor: Cache data array configuration register 1.
- CACHE_
MMU_ ACCESS_ 0 - CACHE_MMU_ACCESS_0 (rw) register accessor: Cache MMU configuration register 0.
- CACHE_
MMU_ ACCESS_ 1 - CACHE_MMU_ACCESS_1 (rw) register accessor: Cache MMU configuration register 1.
- CACHE_
TAG_ ACCESS_ 0 - CACHE_TAG_ACCESS_0 (rw) register accessor: Cache tag configuration register 0.
- CACHE_
TAG_ ACCESS_ 1 - CACHE_TAG_ACCESS_1 (rw) register accessor: Cache tag configuration register 1.
- CLOCK_
GATE - CLOCK_GATE (rw) register accessor: Sensitive module clock gate configuration register.
- CORE_
0_ DRAM0_ PMS_ MONITOR_ 0 - CORE_0_DRAM0_PMS_MONITOR_0 (rw) register accessor: core0 dram0 permission monitor configuration register 0
- CORE_
0_ DRAM0_ PMS_ MONITOR_ 1 - CORE_0_DRAM0_PMS_MONITOR_1 (rw) register accessor: core0 dram0 permission monitor configuration register 1
- CORE_
0_ DRAM0_ PMS_ MONITOR_ 2 - CORE_0_DRAM0_PMS_MONITOR_2 (r) register accessor: core0 dram0 permission monitor configuration register 2.
- CORE_
0_ DRAM0_ PMS_ MONITOR_ 3 - CORE_0_DRAM0_PMS_MONITOR_3 (r) register accessor: core0 dram0 permission monitor configuration register 3.
- CORE_
0_ IRAM0_ PMS_ MONITOR_ 0 - CORE_0_IRAM0_PMS_MONITOR_0 (rw) register accessor: core0 iram0 permission monitor configuration register 0
- CORE_
0_ IRAM0_ PMS_ MONITOR_ 1 - CORE_0_IRAM0_PMS_MONITOR_1 (rw) register accessor: core0 iram0 permission monitor configuration register 1
- CORE_
0_ IRAM0_ PMS_ MONITOR_ 2 - CORE_0_IRAM0_PMS_MONITOR_2 (r) register accessor: core0 iram0 permission monitor configuration register 2
- CORE_
0_ PIF_ PMS_ CONSTRAIN_ 0 - CORE_0_PIF_PMS_CONSTRAIN_0 (rw) register accessor: Core0 access peripherals permission configuration register 0.
- CORE_
0_ PIF_ PMS_ CONSTRAIN_ 1 - CORE_0_PIF_PMS_CONSTRAIN_1 (rw) register accessor: Core0 access peripherals permission configuration register 1.
- CORE_
0_ PIF_ PMS_ CONSTRAIN_ 2 - CORE_0_PIF_PMS_CONSTRAIN_2 (rw) register accessor: Core0 access peripherals permission configuration register 2.
- CORE_
0_ PIF_ PMS_ CONSTRAIN_ 3 - CORE_0_PIF_PMS_CONSTRAIN_3 (rw) register accessor: Core0 access peripherals permission configuration register 3.
- CORE_
0_ PIF_ PMS_ CONSTRAIN_ 4 - CORE_0_PIF_PMS_CONSTRAIN_4 (rw) register accessor: Core0 access peripherals permission configuration register 4.
- CORE_
0_ PIF_ PMS_ CONSTRAIN_ 5 - CORE_0_PIF_PMS_CONSTRAIN_5 (rw) register accessor: Core0 access peripherals permission configuration register 5.
- CORE_
0_ PIF_ PMS_ CONSTRAIN_ 6 - CORE_0_PIF_PMS_CONSTRAIN_6 (rw) register accessor: Core0 access peripherals permission configuration register 6.
- CORE_
0_ PIF_ PMS_ CONSTRAIN_ 7 - CORE_0_PIF_PMS_CONSTRAIN_7 (rw) register accessor: Core0 access peripherals permission configuration register 7.
- CORE_
0_ PIF_ PMS_ CONSTRAIN_ 8 - CORE_0_PIF_PMS_CONSTRAIN_8 (rw) register accessor: Core0 access peripherals permission configuration register 8.
- CORE_
0_ PIF_ PMS_ CONSTRAIN_ 9 - CORE_0_PIF_PMS_CONSTRAIN_9 (rw) register accessor: Core0 access peripherals permission configuration register 9.
- CORE_
0_ PIF_ PMS_ CONSTRAIN_ 10 - CORE_0_PIF_PMS_CONSTRAIN_10 (rw) register accessor: Core0 access peripherals permission configuration register 10.
- CORE_
0_ PIF_ PMS_ CONSTRAIN_ 11 - CORE_0_PIF_PMS_CONSTRAIN_11 (rw) register accessor: Core0 access peripherals permission configuration register 11.
- CORE_
0_ PIF_ PMS_ CONSTRAIN_ 12 - CORE_0_PIF_PMS_CONSTRAIN_12 (rw) register accessor: Core0 access peripherals permission configuration register 12.
- CORE_
0_ PIF_ PMS_ CONSTRAIN_ 13 - CORE_0_PIF_PMS_CONSTRAIN_13 (rw) register accessor: Core0 access peripherals permission configuration register 13.
- CORE_
0_ PIF_ PMS_ CONSTRAIN_ 14 - CORE_0_PIF_PMS_CONSTRAIN_14 (rw) register accessor: Core0 access peripherals permission configuration register 14.
- CORE_
0_ PIF_ PMS_ MONITOR_ 0 - CORE_0_PIF_PMS_MONITOR_0 (rw) register accessor: Core0 permission report register 0.
- CORE_
0_ PIF_ PMS_ MONITOR_ 1 - CORE_0_PIF_PMS_MONITOR_1 (rw) register accessor: Core0 permission report register 1.
- CORE_
0_ PIF_ PMS_ MONITOR_ 2 - CORE_0_PIF_PMS_MONITOR_2 (r) register accessor: Core0 permission report register 2.
- CORE_
0_ PIF_ PMS_ MONITOR_ 3 - CORE_0_PIF_PMS_MONITOR_3 (r) register accessor: Core0 permission report register 3.
- CORE_
0_ PIF_ PMS_ MONITOR_ 4 - CORE_0_PIF_PMS_MONITOR_4 (rw) register accessor: Core0 permission report register 4.
- CORE_
0_ PIF_ PMS_ MONITOR_ 5 - CORE_0_PIF_PMS_MONITOR_5 (r) register accessor: Core0 permission report register 5.
- CORE_
0_ PIF_ PMS_ MONITOR_ 6 - CORE_0_PIF_PMS_MONITOR_6 (r) register accessor: Core0 permission report register 6.
- CORE_
0_ REGION_ PMS_ CONSTRAIN_ 0 - CORE_0_REGION_PMS_CONSTRAIN_0 (rw) register accessor: Core0 region permission register 0.
- CORE_
0_ REGION_ PMS_ CONSTRAIN_ 1 - CORE_0_REGION_PMS_CONSTRAIN_1 (rw) register accessor: Core0 region permission register 1.
- CORE_
0_ REGION_ PMS_ CONSTRAIN_ 2 - CORE_0_REGION_PMS_CONSTRAIN_2 (rw) register accessor: Core0 region permission register 2.
- CORE_
0_ REGION_ PMS_ CONSTRAIN_ 3 - CORE_0_REGION_PMS_CONSTRAIN_3 (rw) register accessor: Core0 region permission register 3.
- CORE_
0_ REGION_ PMS_ CONSTRAIN_ 4 - CORE_0_REGION_PMS_CONSTRAIN_4 (rw) register accessor: Core0 region permission register 4.
- CORE_
0_ REGION_ PMS_ CONSTRAIN_ 5 - CORE_0_REGION_PMS_CONSTRAIN_5 (rw) register accessor: Core0 region permission register 5.
- CORE_
0_ REGION_ PMS_ CONSTRAIN_ 6 - CORE_0_REGION_PMS_CONSTRAIN_6 (rw) register accessor: Core0 region permission register 6.
- CORE_
0_ REGION_ PMS_ CONSTRAIN_ 7 - CORE_0_REGION_PMS_CONSTRAIN_7 (rw) register accessor: Core0 region permission register 7.
- CORE_
0_ REGION_ PMS_ CONSTRAIN_ 8 - CORE_0_REGION_PMS_CONSTRAIN_8 (rw) register accessor: Core0 region permission register 8.
- CORE_
0_ REGION_ PMS_ CONSTRAIN_ 9 - CORE_0_REGION_PMS_CONSTRAIN_9 (rw) register accessor: Core0 region permission register 9.
- CORE_
0_ REGION_ PMS_ CONSTRAIN_ 10 - CORE_0_REGION_PMS_CONSTRAIN_10 (rw) register accessor: Core0 region permission register 10.
- CORE_
0_ REGION_ PMS_ CONSTRAIN_ 11 - CORE_0_REGION_PMS_CONSTRAIN_11 (rw) register accessor: Core0 region permission register 11.
- CORE_
0_ REGION_ PMS_ CONSTRAIN_ 12 - CORE_0_REGION_PMS_CONSTRAIN_12 (rw) register accessor: Core0 region permission register 12.
- CORE_
0_ REGION_ PMS_ CONSTRAIN_ 13 - CORE_0_REGION_PMS_CONSTRAIN_13 (rw) register accessor: Core0 region permission register 13.
- CORE_
0_ REGION_ PMS_ CONSTRAIN_ 14 - CORE_0_REGION_PMS_CONSTRAIN_14 (rw) register accessor: Core0 region permission register 14.
- CORE_
0_ TOOMANYEXCEPTIONS_ M_ OVERRIDE_ 0 - CORE_0_TOOMANYEXCEPTIONS_M_OVERRIDE_0 (rw) register accessor: core0 toomanyexception override configuration register 0.
- CORE_
0_ TOOMANYEXCEPTIONS_ M_ OVERRIDE_ 1 - CORE_0_TOOMANYEXCEPTIONS_M_OVERRIDE_1 (rw) register accessor: core0 toomanyexception override configuration register 1.
- CORE_
0_ VECBASE_ OVERRIDE_ 0 - CORE_0_VECBASE_OVERRIDE_0 (rw) register accessor: core0 vecbase override configuration register 0
- CORE_
0_ VECBASE_ OVERRIDE_ 1 - CORE_0_VECBASE_OVERRIDE_1 (rw) register accessor: core0 vecbase override configuration register 1
- CORE_
0_ VECBASE_ OVERRIDE_ 2 - CORE_0_VECBASE_OVERRIDE_2 (rw) register accessor: core0 vecbase override configuration register 1
- CORE_
0_ VECBASE_ OVERRIDE_ LOCK - CORE_0_VECBASE_OVERRIDE_LOCK (rw) register accessor: core0 vecbase override configuration register 0
- CORE_
1_ DRAM0_ PMS_ MONITOR_ 0 - CORE_1_DRAM0_PMS_MONITOR_0 (rw) register accessor: core1 dram0 permission monitor configuration register 0
- CORE_
1_ DRAM0_ PMS_ MONITOR_ 1 - CORE_1_DRAM0_PMS_MONITOR_1 (rw) register accessor: core1 dram0 permission monitor configuration register 1
- CORE_
1_ DRAM0_ PMS_ MONITOR_ 2 - CORE_1_DRAM0_PMS_MONITOR_2 (r) register accessor: core1 dram0 permission monitor configuration register 2.
- CORE_
1_ DRAM0_ PMS_ MONITOR_ 3 - CORE_1_DRAM0_PMS_MONITOR_3 (r) register accessor: core1 dram0 permission monitor configuration register 3.
- CORE_
1_ IRAM0_ PMS_ MONITOR_ 0 - CORE_1_IRAM0_PMS_MONITOR_0 (rw) register accessor: core1 iram0 permission monitor configuration register 0
- CORE_
1_ IRAM0_ PMS_ MONITOR_ 1 - CORE_1_IRAM0_PMS_MONITOR_1 (rw) register accessor: core1 iram0 permission monitor configuration register 1
- CORE_
1_ IRAM0_ PMS_ MONITOR_ 2 - CORE_1_IRAM0_PMS_MONITOR_2 (r) register accessor: core1 iram0 permission monitor configuration register 2
- CORE_
1_ PIF_ PMS_ CONSTRAIN_ 0 - CORE_1_PIF_PMS_CONSTRAIN_0 (rw) register accessor: Core1 access peripherals permission configuration register 0.
- CORE_
1_ PIF_ PMS_ CONSTRAIN_ 1 - CORE_1_PIF_PMS_CONSTRAIN_1 (rw) register accessor: Core1 access peripherals permission configuration register 1.
- CORE_
1_ PIF_ PMS_ CONSTRAIN_ 2 - CORE_1_PIF_PMS_CONSTRAIN_2 (rw) register accessor: Core1 access peripherals permission configuration register 2.
- CORE_
1_ PIF_ PMS_ CONSTRAIN_ 3 - CORE_1_PIF_PMS_CONSTRAIN_3 (rw) register accessor: Core1 access peripherals permission configuration register 3.
- CORE_
1_ PIF_ PMS_ CONSTRAIN_ 4 - CORE_1_PIF_PMS_CONSTRAIN_4 (rw) register accessor: Core1 access peripherals permission configuration register 4.
- CORE_
1_ PIF_ PMS_ CONSTRAIN_ 5 - CORE_1_PIF_PMS_CONSTRAIN_5 (rw) register accessor: Core1 access peripherals permission configuration register 5.
- CORE_
1_ PIF_ PMS_ CONSTRAIN_ 6 - CORE_1_PIF_PMS_CONSTRAIN_6 (rw) register accessor: Core1 access peripherals permission configuration register 6.
- CORE_
1_ PIF_ PMS_ CONSTRAIN_ 7 - CORE_1_PIF_PMS_CONSTRAIN_7 (rw) register accessor: Core1 access peripherals permission configuration register 7.
- CORE_
1_ PIF_ PMS_ CONSTRAIN_ 8 - CORE_1_PIF_PMS_CONSTRAIN_8 (rw) register accessor: Core1 access peripherals permission configuration register 8.
- CORE_
1_ PIF_ PMS_ CONSTRAIN_ 9 - CORE_1_PIF_PMS_CONSTRAIN_9 (rw) register accessor: Core1 access peripherals permission configuration register 9.
- CORE_
1_ PIF_ PMS_ CONSTRAIN_ 10 - CORE_1_PIF_PMS_CONSTRAIN_10 (rw) register accessor: core1 access peripherals permission configuration register 10.
- CORE_
1_ PIF_ PMS_ CONSTRAIN_ 11 - CORE_1_PIF_PMS_CONSTRAIN_11 (rw) register accessor: core1 access peripherals permission configuration register 11.
- CORE_
1_ PIF_ PMS_ CONSTRAIN_ 12 - CORE_1_PIF_PMS_CONSTRAIN_12 (rw) register accessor: core1 access peripherals permission configuration register 12.
- CORE_
1_ PIF_ PMS_ CONSTRAIN_ 13 - CORE_1_PIF_PMS_CONSTRAIN_13 (rw) register accessor: core1 access peripherals permission configuration register 13.
- CORE_
1_ PIF_ PMS_ CONSTRAIN_ 14 - CORE_1_PIF_PMS_CONSTRAIN_14 (rw) register accessor: core1 access peripherals permission configuration register 14.
- CORE_
1_ PIF_ PMS_ MONITOR_ 0 - CORE_1_PIF_PMS_MONITOR_0 (rw) register accessor: core1 permission report register 0.
- CORE_
1_ PIF_ PMS_ MONITOR_ 1 - CORE_1_PIF_PMS_MONITOR_1 (rw) register accessor: core1 permission report register 1.
- CORE_
1_ PIF_ PMS_ MONITOR_ 2 - CORE_1_PIF_PMS_MONITOR_2 (r) register accessor: core1 permission report register 2.
- CORE_
1_ PIF_ PMS_ MONITOR_ 3 - CORE_1_PIF_PMS_MONITOR_3 (r) register accessor: core1 permission report register 3.
- CORE_
1_ PIF_ PMS_ MONITOR_ 4 - CORE_1_PIF_PMS_MONITOR_4 (rw) register accessor: core1 permission report register 4.
- CORE_
1_ PIF_ PMS_ MONITOR_ 5 - CORE_1_PIF_PMS_MONITOR_5 (r) register accessor: core1 permission report register 5.
- CORE_
1_ PIF_ PMS_ MONITOR_ 6 - CORE_1_PIF_PMS_MONITOR_6 (r) register accessor: core1 permission report register 6.
- CORE_
1_ REGION_ PMS_ CONSTRAIN_ 0 - CORE_1_REGION_PMS_CONSTRAIN_0 (rw) register accessor: core1 region permission register 0.
- CORE_
1_ REGION_ PMS_ CONSTRAIN_ 1 - CORE_1_REGION_PMS_CONSTRAIN_1 (rw) register accessor: core1 region permission register 1.
- CORE_
1_ REGION_ PMS_ CONSTRAIN_ 2 - CORE_1_REGION_PMS_CONSTRAIN_2 (rw) register accessor: core1 region permission register 2.
- CORE_
1_ REGION_ PMS_ CONSTRAIN_ 3 - CORE_1_REGION_PMS_CONSTRAIN_3 (rw) register accessor: core1 region permission register 3.
- CORE_
1_ REGION_ PMS_ CONSTRAIN_ 4 - CORE_1_REGION_PMS_CONSTRAIN_4 (rw) register accessor: core1 region permission register 4.
- CORE_
1_ REGION_ PMS_ CONSTRAIN_ 5 - CORE_1_REGION_PMS_CONSTRAIN_5 (rw) register accessor: core1 region permission register 5.
- CORE_
1_ REGION_ PMS_ CONSTRAIN_ 6 - CORE_1_REGION_PMS_CONSTRAIN_6 (rw) register accessor: core1 region permission register 6.
- CORE_
1_ REGION_ PMS_ CONSTRAIN_ 7 - CORE_1_REGION_PMS_CONSTRAIN_7 (rw) register accessor: core1 region permission register 7.
- CORE_
1_ REGION_ PMS_ CONSTRAIN_ 8 - CORE_1_REGION_PMS_CONSTRAIN_8 (rw) register accessor: core1 region permission register 8.
- CORE_
1_ REGION_ PMS_ CONSTRAIN_ 9 - CORE_1_REGION_PMS_CONSTRAIN_9 (rw) register accessor: core1 region permission register 9.
- CORE_
1_ REGION_ PMS_ CONSTRAIN_ 10 - CORE_1_REGION_PMS_CONSTRAIN_10 (rw) register accessor: core1 region permission register 10.
- CORE_
1_ REGION_ PMS_ CONSTRAIN_ 11 - CORE_1_REGION_PMS_CONSTRAIN_11 (rw) register accessor: core1 region permission register 11.
- CORE_
1_ REGION_ PMS_ CONSTRAIN_ 12 - CORE_1_REGION_PMS_CONSTRAIN_12 (rw) register accessor: core1 region permission register 12.
- CORE_
1_ REGION_ PMS_ CONSTRAIN_ 13 - CORE_1_REGION_PMS_CONSTRAIN_13 (rw) register accessor: core1 region permission register 13.
- CORE_
1_ REGION_ PMS_ CONSTRAIN_ 14 - CORE_1_REGION_PMS_CONSTRAIN_14 (rw) register accessor: core1 region permission register 14.
- CORE_
1_ TOOMANYEXCEPTIONS_ M_ OVERRIDE_ 0 - CORE_1_TOOMANYEXCEPTIONS_M_OVERRIDE_0 (rw) register accessor: core1 toomanyexception override configuration register 0.
- CORE_
1_ TOOMANYEXCEPTIONS_ M_ OVERRIDE_ 1 - CORE_1_TOOMANYEXCEPTIONS_M_OVERRIDE_1 (rw) register accessor: core1 toomanyexception override configuration register 1.
- CORE_
1_ VECBASE_ OVERRIDE_ 0 - CORE_1_VECBASE_OVERRIDE_0 (rw) register accessor: core1 vecbase override configuration register 0
- CORE_
1_ VECBASE_ OVERRIDE_ 1 - CORE_1_VECBASE_OVERRIDE_1 (rw) register accessor: core1 vecbase override configuration register 1
- CORE_
1_ VECBASE_ OVERRIDE_ 2 - CORE_1_VECBASE_OVERRIDE_2 (rw) register accessor: core1 vecbase override configuration register 1
- CORE_
1_ VECBASE_ OVERRIDE_ LOCK - CORE_1_VECBASE_OVERRIDE_LOCK (rw) register accessor: core1 vecbase override configuration register 0
- CORE_
X_ DRAM0_ PMS_ CONSTRAIN_ 0 - CORE_X_DRAM0_PMS_CONSTRAIN_0 (rw) register accessor: corex dram0 permission configuration register 0
- CORE_
X_ DRAM0_ PMS_ CONSTRAIN_ 1 - CORE_X_DRAM0_PMS_CONSTRAIN_1 (rw) register accessor: corex dram0 permission configuration register 1
- CORE_
X_ IRAM0_ DRAM0_ DMA_ SPLIT_ LINE_ CONSTRAIN_ 0 - CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_0 (rw) register accessor: sram split line configuration register 0
- CORE_
X_ IRAM0_ DRAM0_ DMA_ SPLIT_ LINE_ CONSTRAIN_ 1 - CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_1 (rw) register accessor: sram split line configuration register 1
- CORE_
X_ IRAM0_ DRAM0_ DMA_ SPLIT_ LINE_ CONSTRAIN_ 2 - CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_2 (rw) register accessor: sram split line configuration register 1
- CORE_
X_ IRAM0_ DRAM0_ DMA_ SPLIT_ LINE_ CONSTRAIN_ 3 - CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_3 (rw) register accessor: sram split line configuration register 1
- CORE_
X_ IRAM0_ DRAM0_ DMA_ SPLIT_ LINE_ CONSTRAIN_ 4 - CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_4 (rw) register accessor: sram split line configuration register 1
- CORE_
X_ IRAM0_ DRAM0_ DMA_ SPLIT_ LINE_ CONSTRAIN_ 5 - CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_5 (rw) register accessor: sram split line configuration register 1
- CORE_
X_ IRAM0_ PMS_ CONSTRAIN_ 0 - CORE_X_IRAM0_PMS_CONSTRAIN_0 (rw) register accessor: corex iram0 permission configuration register 0
- CORE_
X_ IRAM0_ PMS_ CONSTRAIN_ 1 - CORE_X_IRAM0_PMS_CONSTRAIN_1 (rw) register accessor: corex iram0 permission configuration register 0
- CORE_
X_ IRAM0_ PMS_ CONSTRAIN_ 2 - CORE_X_IRAM0_PMS_CONSTRAIN_2 (rw) register accessor: corex iram0 permission configuration register 1
- DATE
- DATE (rw) register accessor: Sensitive version register.
- DMA_
APBPERI_ ADC_ DAC_ PMS_ CONSTRAIN_ 0 - DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_0 (rw) register accessor: adc_dac dma permission configuration register 0.
- DMA_
APBPERI_ ADC_ DAC_ PMS_ CONSTRAIN_ 1 - DMA_APBPERI_ADC_DAC_PMS_CONSTRAIN_1 (rw) register accessor: adc_dac dma permission configuration register 1.
- DMA_
APBPERI_ AES_ PMS_ CONSTRAIN_ 0 - DMA_APBPERI_AES_PMS_CONSTRAIN_0 (rw) register accessor: aes dma permission configuration register 0.
- DMA_
APBPERI_ AES_ PMS_ CONSTRAIN_ 1 - DMA_APBPERI_AES_PMS_CONSTRAIN_1 (rw) register accessor: aes dma permission configuration register 1.
- DMA_
APBPERI_ BACKUP_ PMS_ CONSTRAIN_ 0 - DMA_APBPERI_BACKUP_PMS_CONSTRAIN_0 (rw) register accessor: backup dma permission configuration register 0.
- DMA_
APBPERI_ BACKUP_ PMS_ CONSTRAIN_ 1 - DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1 (rw) register accessor: backup dma permission configuration register 1.
- DMA_
APBPERI_ I2S0_ PMS_ CONSTRAIN_ 0 - DMA_APBPERI_I2S0_PMS_CONSTRAIN_0 (rw) register accessor: i2s0 dma permission configuration register 0.
- DMA_
APBPERI_ I2S0_ PMS_ CONSTRAIN_ 1 - DMA_APBPERI_I2S0_PMS_CONSTRAIN_1 (rw) register accessor: i2s0 dma permission configuration register 1.
- DMA_
APBPERI_ I2S1_ PMS_ CONSTRAIN_ 0 - DMA_APBPERI_I2S1_PMS_CONSTRAIN_0 (rw) register accessor: i2s1 dma permission configuration register 0.
- DMA_
APBPERI_ I2S1_ PMS_ CONSTRAIN_ 1 - DMA_APBPERI_I2S1_PMS_CONSTRAIN_1 (rw) register accessor: i2s1 dma permission configuration register 1.
- DMA_
APBPERI_ LCD_ CAM_ PMS_ CONSTRAIN_ 0 - DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_0 (rw) register accessor: lcd_cam dma permission configuration register 0.
- DMA_
APBPERI_ LCD_ CAM_ PMS_ CONSTRAIN_ 1 - DMA_APBPERI_LCD_CAM_PMS_CONSTRAIN_1 (rw) register accessor: lcd_cam dma permission configuration register 1.
- DMA_
APBPERI_ LC_ PMS_ CONSTRAIN_ 0 - DMA_APBPERI_LC_PMS_CONSTRAIN_0 (rw) register accessor: lc dma permission configuration register 0.
- DMA_
APBPERI_ LC_ PMS_ CONSTRAIN_ 1 - DMA_APBPERI_LC_PMS_CONSTRAIN_1 (rw) register accessor: lc dma permission configuration register 1.
- DMA_
APBPERI_ MAC_ PMS_ CONSTRAIN_ 0 - DMA_APBPERI_MAC_PMS_CONSTRAIN_0 (rw) register accessor: mac dma permission configuration register 0.
- DMA_
APBPERI_ MAC_ PMS_ CONSTRAIN_ 1 - DMA_APBPERI_MAC_PMS_CONSTRAIN_1 (rw) register accessor: mac dma permission configuration register 1.
- DMA_
APBPERI_ PMS_ MONITOR_ 0 - DMA_APBPERI_PMS_MONITOR_0 (rw) register accessor: dma permission monitor configuration register 0.
- DMA_
APBPERI_ PMS_ MONITOR_ 1 - DMA_APBPERI_PMS_MONITOR_1 (rw) register accessor: dma permission monitor configuration register 1.
- DMA_
APBPERI_ PMS_ MONITOR_ 2 - DMA_APBPERI_PMS_MONITOR_2 (r) register accessor: dma permission monitor configuration register 2.
- DMA_
APBPERI_ PMS_ MONITOR_ 3 - DMA_APBPERI_PMS_MONITOR_3 (r) register accessor: dma permission monitor configuration register 3.
- DMA_
APBPERI_ RMT_ PMS_ CONSTRAIN_ 0 - DMA_APBPERI_RMT_PMS_CONSTRAIN_0 (rw) register accessor: rmt dma permission configuration register 0.
- DMA_
APBPERI_ RMT_ PMS_ CONSTRAIN_ 1 - DMA_APBPERI_RMT_PMS_CONSTRAIN_1 (rw) register accessor: rmt dma permission configuration register 1.
- DMA_
APBPERI_ SDIO_ PMS_ CONSTRAIN_ 0 - DMA_APBPERI_SDIO_PMS_CONSTRAIN_0 (rw) register accessor: sdio dma permission configuration register 0.
- DMA_
APBPERI_ SDIO_ PMS_ CONSTRAIN_ 1 - DMA_APBPERI_SDIO_PMS_CONSTRAIN_1 (rw) register accessor: sdio dma permission configuration register 1.
- DMA_
APBPERI_ SHA_ PMS_ CONSTRAIN_ 0 - DMA_APBPERI_SHA_PMS_CONSTRAIN_0 (rw) register accessor: sha dma permission configuration register 0.
- DMA_
APBPERI_ SHA_ PMS_ CONSTRAIN_ 1 - DMA_APBPERI_SHA_PMS_CONSTRAIN_1 (rw) register accessor: sha dma permission configuration register 1.
- DMA_
APBPERI_ SPI2_ PMS_ CONSTRAIN_ 0 - DMA_APBPERI_SPI2_PMS_CONSTRAIN_0 (rw) register accessor: spi2 dma permission configuration register 0.
- DMA_
APBPERI_ SPI2_ PMS_ CONSTRAIN_ 1 - DMA_APBPERI_SPI2_PMS_CONSTRAIN_1 (rw) register accessor: spi2 dma permission configuration register 1.
- DMA_
APBPERI_ SPI3_ PMS_ CONSTRAIN_ 0 - DMA_APBPERI_SPI3_PMS_CONSTRAIN_0 (rw) register accessor: spi3 dma permission configuration register 0.
- DMA_
APBPERI_ SPI3_ PMS_ CONSTRAIN_ 1 - DMA_APBPERI_SPI3_PMS_CONSTRAIN_1 (rw) register accessor: spi3 dma permission configuration register 1.
- DMA_
APBPERI_ UHCI0_ PMS_ CONSTRAIN_ 0 - DMA_APBPERI_UHCI0_PMS_CONSTRAIN_0 (rw) register accessor: uhci0 dma permission configuration register 0.
- DMA_
APBPERI_ UHCI0_ PMS_ CONSTRAIN_ 1 - DMA_APBPERI_UHCI0_PMS_CONSTRAIN_1 (rw) register accessor: uhci0 dma permission configuration register 1.
- DMA_
APBPERI_ USB_ PMS_ CONSTRAIN_ 0 - DMA_APBPERI_USB_PMS_CONSTRAIN_0 (rw) register accessor: usb dma permission configuration register 0.
- DMA_
APBPERI_ USB_ PMS_ CONSTRAIN_ 1 - DMA_APBPERI_USB_PMS_CONSTRAIN_1 (rw) register accessor: usb dma permission configuration register 1.
- EDMA_
BOUNDARY_ 0 - EDMA_BOUNDARY_0 (rw) register accessor: EDMA boundary 0 configuration
- EDMA_
BOUNDARY_ 1 - EDMA_BOUNDARY_1 (rw) register accessor: EDMA boundary 1 configuration
- EDMA_
BOUNDARY_ 2 - EDMA_BOUNDARY_2 (rw) register accessor: EDMA boundary 2 configuration
- EDMA_
BOUNDARY_ LOCK - EDMA_BOUNDARY_LOCK (rw) register accessor: EDMA boundary lock register.
- EDMA_
PMS_ ADC_ DAC - EDMA_PMS_ADC_DAC (rw) register accessor: EDMA-ADC/DAC permission control register.
- EDMA_
PMS_ ADC_ DAC_ LOCK - EDMA_PMS_ADC_DAC_LOCK (rw) register accessor: EDMA-ADC/DAC permission lock register.
- EDMA_
PMS_ AES - EDMA_PMS_AES (rw) register accessor: EDMA-AES permission control register.
- EDMA_
PMS_ AES_ LOCK - EDMA_PMS_AES_LOCK (rw) register accessor: EDMA-AES permission lock register.
- EDMA_
PMS_ I2S0 - EDMA_PMS_I2S0 (rw) register accessor: EDMA-I2S0 permission control register.
- EDMA_
PMS_ I2S0_ LOCK - EDMA_PMS_I2S0_LOCK (rw) register accessor: EDMA-I2S0 permission lock register.
- EDMA_
PMS_ I2S1 - EDMA_PMS_I2S1 (rw) register accessor: EDMA-I2S1 permission control register.
- EDMA_
PMS_ I2S1_ LOCK - EDMA_PMS_I2S1_LOCK (rw) register accessor: EDMA-I2S1 permission lock register.
- EDMA_
PMS_ LCD_ CAM - EDMA_PMS_LCD_CAM (rw) register accessor: EDMA-LCD/CAM permission control register.
- EDMA_
PMS_ LCD_ CAM_ LOCK - EDMA_PMS_LCD_CAM_LOCK (rw) register accessor: EDMA-LCD/CAM permission lock register.
- EDMA_
PMS_ RMT - EDMA_PMS_RMT (rw) register accessor: EDMA-RMT permission control register.
- EDMA_
PMS_ RMT_ LOCK - EDMA_PMS_RMT_LOCK (rw) register accessor: EDMA-RMT permission lock register.
- EDMA_
PMS_ SHA - EDMA_PMS_SHA (rw) register accessor: EDMA-SHA permission control register.
- EDMA_
PMS_ SHA_ LOCK - EDMA_PMS_SHA_LOCK (rw) register accessor: EDMA-SHA permission lock register.
- EDMA_
PMS_ SPI2 - EDMA_PMS_SPI2 (rw) register accessor: EDMA-SPI2 permission control register.
- EDMA_
PMS_ SPI3 - EDMA_PMS_SPI3 (rw) register accessor: EDMA-SPI3 permission control register.
- EDMA_
PMS_ SPI2_ LOCK - EDMA_PMS_SPI2_LOCK (rw) register accessor: EDMA-SPI2 permission lock register.
- EDMA_
PMS_ SPI3_ LOCK - EDMA_PMS_SPI3_LOCK (rw) register accessor: EDMA-SPI3 permission lock register.
- EDMA_
PMS_ UHCI0 - EDMA_PMS_UHCI0 (rw) register accessor: EDMA-UHCI0 permission control register.
- EDMA_
PMS_ UHCI0_ LOCK - EDMA_PMS_UHCI0_LOCK (rw) register accessor: EDMA-UHCI0 permission lock register.
- INTERNAL_
SRAM_ USAGE_ 0 - INTERNAL_SRAM_USAGE_0 (rw) register accessor: Internal SRAM configuration register 0.
- INTERNAL_
SRAM_ USAGE_ 1 - INTERNAL_SRAM_USAGE_1 (rw) register accessor: Internal SRAM configuration register 1.
- INTERNAL_
SRAM_ USAGE_ 2 - INTERNAL_SRAM_USAGE_2 (rw) register accessor: Internal SRAM configuration register 2.
- INTERNAL_
SRAM_ USAGE_ 3 - INTERNAL_SRAM_USAGE_3 (rw) register accessor: Internal SRAM configuration register 3.
- INTERNAL_
SRAM_ USAGE_ 4 - INTERNAL_SRAM_USAGE_4 (rw) register accessor: Internal SRAM configuration register 4.
- RETENTION_
DISABLE - RETENTION_DISABLE (rw) register accessor: Retention configuration register.
- RTC_PMS
- RTC_PMS (rw) register accessor: RTC coprocessor permission register.