Module esp32s3::spi0::sram_clk

source ·
Expand description

SPI_CLK clock division register when SPI0 accesses to Ext_RAM.

Structs

Register SRAM_CLK reader
SPI_CLK clock division register when SPI0 accesses to Ext_RAM.
Register SRAM_CLK writer

Type Definitions

Field SCLKCNT_H reader - It must be a floor value of ((SPI_MEM_SCLKCNT_N+1)/2-1).
Field SCLKCNT_H writer - It must be a floor value of ((SPI_MEM_SCLKCNT_N+1)/2-1).
Field SCLKCNT_L reader - It must equal to the value of SPI_MEM_SCLKCNT_N.
Field SCLKCNT_L writer - It must equal to the value of SPI_MEM_SCLKCNT_N.
Field SCLKCNT_N reader - When SPI0 accesses to Ext_RAM, f_SPI_CLK = f_MSPI_CORE_CLK/(SPI_MEM_SCLKCNT_N+1)
Field SCLKCNT_N writer - When SPI0 accesses to Ext_RAM, f_SPI_CLK = f_MSPI_CORE_CLK/(SPI_MEM_SCLKCNT_N+1)
Field SCLK_EQU_SYSCLK reader - When SPI0 accesses to Ext_RAM, set this bit in 1-division mode, f_SPI_CLK = f_MSPI_CORE_CLK.
Field SCLK_EQU_SYSCLK writer - When SPI0 accesses to Ext_RAM, set this bit in 1-division mode, f_SPI_CLK = f_MSPI_CORE_CLK.