esp32s3/usb0/hc/
int.rs

1#[doc = "Register `INT` reader"]
2pub type R = crate::R<INT_SPEC>;
3#[doc = "Register `INT` writer"]
4pub type W = crate::W<INT_SPEC>;
5#[doc = "Field `XFERCOMPL` reader - "]
6pub type XFERCOMPL_R = crate::BitReader;
7#[doc = "Field `XFERCOMPL` writer - "]
8pub type XFERCOMPL_W<'a, REG> = crate::BitWriter1C<'a, REG>;
9#[doc = "Field `CHHLTD` reader - "]
10pub type CHHLTD_R = crate::BitReader;
11#[doc = "Field `CHHLTD` writer - "]
12pub type CHHLTD_W<'a, REG> = crate::BitWriter1C<'a, REG>;
13#[doc = "Field `AHBERR` reader - "]
14pub type AHBERR_R = crate::BitReader;
15#[doc = "Field `AHBERR` writer - "]
16pub type AHBERR_W<'a, REG> = crate::BitWriter1C<'a, REG>;
17#[doc = "Field `STALL` reader - "]
18pub type STALL_R = crate::BitReader;
19#[doc = "Field `STALL` writer - "]
20pub type STALL_W<'a, REG> = crate::BitWriter1C<'a, REG>;
21#[doc = "Field `NACK` reader - "]
22pub type NACK_R = crate::BitReader;
23#[doc = "Field `NACK` writer - "]
24pub type NACK_W<'a, REG> = crate::BitWriter1C<'a, REG>;
25#[doc = "Field `ACK` reader - "]
26pub type ACK_R = crate::BitReader;
27#[doc = "Field `ACK` writer - "]
28pub type ACK_W<'a, REG> = crate::BitWriter1C<'a, REG>;
29#[doc = "Field `NYET` reader - "]
30pub type NYET_R = crate::BitReader;
31#[doc = "Field `NYET` writer - "]
32pub type NYET_W<'a, REG> = crate::BitWriter1C<'a, REG>;
33#[doc = "Field `XACTERR` reader - "]
34pub type XACTERR_R = crate::BitReader;
35#[doc = "Field `XACTERR` writer - "]
36pub type XACTERR_W<'a, REG> = crate::BitWriter1C<'a, REG>;
37#[doc = "Field `BBLERR` reader - "]
38pub type BBLERR_R = crate::BitReader;
39#[doc = "Field `BBLERR` writer - "]
40pub type BBLERR_W<'a, REG> = crate::BitWriter1C<'a, REG>;
41#[doc = "Field `FRMOVRUN` reader - "]
42pub type FRMOVRUN_R = crate::BitReader;
43#[doc = "Field `FRMOVRUN` writer - "]
44pub type FRMOVRUN_W<'a, REG> = crate::BitWriter1C<'a, REG>;
45#[doc = "Field `DATATGLERR` reader - "]
46pub type DATATGLERR_R = crate::BitReader;
47#[doc = "Field `DATATGLERR` writer - "]
48pub type DATATGLERR_W<'a, REG> = crate::BitWriter1C<'a, REG>;
49#[doc = "Field `BNAINTR` reader - "]
50pub type BNAINTR_R = crate::BitReader;
51#[doc = "Field `BNAINTR` writer - "]
52pub type BNAINTR_W<'a, REG> = crate::BitWriter1C<'a, REG>;
53#[doc = "Field `XCS_XACT_ERR` reader - "]
54pub type XCS_XACT_ERR_R = crate::BitReader;
55#[doc = "Field `XCS_XACT_ERR` writer - "]
56pub type XCS_XACT_ERR_W<'a, REG> = crate::BitWriter1C<'a, REG>;
57#[doc = "Field `DESC_LST_ROLLINTR` reader - "]
58pub type DESC_LST_ROLLINTR_R = crate::BitReader;
59#[doc = "Field `DESC_LST_ROLLINTR` writer - "]
60pub type DESC_LST_ROLLINTR_W<'a, REG> = crate::BitWriter1C<'a, REG>;
61impl R {
62    #[doc = "Bit 0"]
63    #[inline(always)]
64    pub fn xfercompl(&self) -> XFERCOMPL_R {
65        XFERCOMPL_R::new((self.bits & 1) != 0)
66    }
67    #[doc = "Bit 1"]
68    #[inline(always)]
69    pub fn chhltd(&self) -> CHHLTD_R {
70        CHHLTD_R::new(((self.bits >> 1) & 1) != 0)
71    }
72    #[doc = "Bit 2"]
73    #[inline(always)]
74    pub fn ahberr(&self) -> AHBERR_R {
75        AHBERR_R::new(((self.bits >> 2) & 1) != 0)
76    }
77    #[doc = "Bit 3"]
78    #[inline(always)]
79    pub fn stall(&self) -> STALL_R {
80        STALL_R::new(((self.bits >> 3) & 1) != 0)
81    }
82    #[doc = "Bit 4"]
83    #[inline(always)]
84    pub fn nack(&self) -> NACK_R {
85        NACK_R::new(((self.bits >> 4) & 1) != 0)
86    }
87    #[doc = "Bit 5"]
88    #[inline(always)]
89    pub fn ack(&self) -> ACK_R {
90        ACK_R::new(((self.bits >> 5) & 1) != 0)
91    }
92    #[doc = "Bit 6"]
93    #[inline(always)]
94    pub fn nyet(&self) -> NYET_R {
95        NYET_R::new(((self.bits >> 6) & 1) != 0)
96    }
97    #[doc = "Bit 7"]
98    #[inline(always)]
99    pub fn xacterr(&self) -> XACTERR_R {
100        XACTERR_R::new(((self.bits >> 7) & 1) != 0)
101    }
102    #[doc = "Bit 8"]
103    #[inline(always)]
104    pub fn bblerr(&self) -> BBLERR_R {
105        BBLERR_R::new(((self.bits >> 8) & 1) != 0)
106    }
107    #[doc = "Bit 9"]
108    #[inline(always)]
109    pub fn frmovrun(&self) -> FRMOVRUN_R {
110        FRMOVRUN_R::new(((self.bits >> 9) & 1) != 0)
111    }
112    #[doc = "Bit 10"]
113    #[inline(always)]
114    pub fn datatglerr(&self) -> DATATGLERR_R {
115        DATATGLERR_R::new(((self.bits >> 10) & 1) != 0)
116    }
117    #[doc = "Bit 11"]
118    #[inline(always)]
119    pub fn bnaintr(&self) -> BNAINTR_R {
120        BNAINTR_R::new(((self.bits >> 11) & 1) != 0)
121    }
122    #[doc = "Bit 12"]
123    #[inline(always)]
124    pub fn xcs_xact_err(&self) -> XCS_XACT_ERR_R {
125        XCS_XACT_ERR_R::new(((self.bits >> 12) & 1) != 0)
126    }
127    #[doc = "Bit 13"]
128    #[inline(always)]
129    pub fn desc_lst_rollintr(&self) -> DESC_LST_ROLLINTR_R {
130        DESC_LST_ROLLINTR_R::new(((self.bits >> 13) & 1) != 0)
131    }
132}
133#[cfg(feature = "impl-register-debug")]
134impl core::fmt::Debug for R {
135    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
136        f.debug_struct("INT")
137            .field("xfercompl", &self.xfercompl())
138            .field("chhltd", &self.chhltd())
139            .field("ahberr", &self.ahberr())
140            .field("stall", &self.stall())
141            .field("nack", &self.nack())
142            .field("ack", &self.ack())
143            .field("nyet", &self.nyet())
144            .field("xacterr", &self.xacterr())
145            .field("bblerr", &self.bblerr())
146            .field("frmovrun", &self.frmovrun())
147            .field("datatglerr", &self.datatglerr())
148            .field("bnaintr", &self.bnaintr())
149            .field("xcs_xact_err", &self.xcs_xact_err())
150            .field("desc_lst_rollintr", &self.desc_lst_rollintr())
151            .finish()
152    }
153}
154impl W {
155    #[doc = "Bit 0"]
156    #[inline(always)]
157    pub fn xfercompl(&mut self) -> XFERCOMPL_W<INT_SPEC> {
158        XFERCOMPL_W::new(self, 0)
159    }
160    #[doc = "Bit 1"]
161    #[inline(always)]
162    pub fn chhltd(&mut self) -> CHHLTD_W<INT_SPEC> {
163        CHHLTD_W::new(self, 1)
164    }
165    #[doc = "Bit 2"]
166    #[inline(always)]
167    pub fn ahberr(&mut self) -> AHBERR_W<INT_SPEC> {
168        AHBERR_W::new(self, 2)
169    }
170    #[doc = "Bit 3"]
171    #[inline(always)]
172    pub fn stall(&mut self) -> STALL_W<INT_SPEC> {
173        STALL_W::new(self, 3)
174    }
175    #[doc = "Bit 4"]
176    #[inline(always)]
177    pub fn nack(&mut self) -> NACK_W<INT_SPEC> {
178        NACK_W::new(self, 4)
179    }
180    #[doc = "Bit 5"]
181    #[inline(always)]
182    pub fn ack(&mut self) -> ACK_W<INT_SPEC> {
183        ACK_W::new(self, 5)
184    }
185    #[doc = "Bit 6"]
186    #[inline(always)]
187    pub fn nyet(&mut self) -> NYET_W<INT_SPEC> {
188        NYET_W::new(self, 6)
189    }
190    #[doc = "Bit 7"]
191    #[inline(always)]
192    pub fn xacterr(&mut self) -> XACTERR_W<INT_SPEC> {
193        XACTERR_W::new(self, 7)
194    }
195    #[doc = "Bit 8"]
196    #[inline(always)]
197    pub fn bblerr(&mut self) -> BBLERR_W<INT_SPEC> {
198        BBLERR_W::new(self, 8)
199    }
200    #[doc = "Bit 9"]
201    #[inline(always)]
202    pub fn frmovrun(&mut self) -> FRMOVRUN_W<INT_SPEC> {
203        FRMOVRUN_W::new(self, 9)
204    }
205    #[doc = "Bit 10"]
206    #[inline(always)]
207    pub fn datatglerr(&mut self) -> DATATGLERR_W<INT_SPEC> {
208        DATATGLERR_W::new(self, 10)
209    }
210    #[doc = "Bit 11"]
211    #[inline(always)]
212    pub fn bnaintr(&mut self) -> BNAINTR_W<INT_SPEC> {
213        BNAINTR_W::new(self, 11)
214    }
215    #[doc = "Bit 12"]
216    #[inline(always)]
217    pub fn xcs_xact_err(&mut self) -> XCS_XACT_ERR_W<INT_SPEC> {
218        XCS_XACT_ERR_W::new(self, 12)
219    }
220    #[doc = "Bit 13"]
221    #[inline(always)]
222    pub fn desc_lst_rollintr(&mut self) -> DESC_LST_ROLLINTR_W<INT_SPEC> {
223        DESC_LST_ROLLINTR_W::new(self, 13)
224    }
225}
226#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`int::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
227pub struct INT_SPEC;
228impl crate::RegisterSpec for INT_SPEC {
229    type Ux = u32;
230}
231#[doc = "`read()` method returns [`int::R`](R) reader structure"]
232impl crate::Readable for INT_SPEC {}
233#[doc = "`write(|w| ..)` method takes [`int::W`](W) writer structure"]
234impl crate::Writable for INT_SPEC {
235    type Safety = crate::Unsafe;
236    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x3fff;
237}
238#[doc = "`reset()` method sets INT to value 0"]
239impl crate::Resettable for INT_SPEC {}