esp32s3/sensitive/
backup_bus_pms_monitor_1.rs1#[doc = "Register `BACKUP_BUS_PMS_MONITOR_1` reader"]
2pub type R = crate::R<BACKUP_BUS_PMS_MONITOR_1_SPEC>;
3#[doc = "Register `BACKUP_BUS_PMS_MONITOR_1` writer"]
4pub type W = crate::W<BACKUP_BUS_PMS_MONITOR_1_SPEC>;
5#[doc = "Field `BACKUP_BUS_PMS_MONITOR_VIOLATE_CLR` reader - Set 1 to clear interrupt that BackUp initiate illegal access."]
6pub type BACKUP_BUS_PMS_MONITOR_VIOLATE_CLR_R = crate::BitReader;
7#[doc = "Field `BACKUP_BUS_PMS_MONITOR_VIOLATE_CLR` writer - Set 1 to clear interrupt that BackUp initiate illegal access."]
8pub type BACKUP_BUS_PMS_MONITOR_VIOLATE_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `BACKUP_BUS_PMS_MONITOR_VIOLATE_EN` reader - Set 1 to enable interrupt that BackUp initiate illegal access."]
10pub type BACKUP_BUS_PMS_MONITOR_VIOLATE_EN_R = crate::BitReader;
11#[doc = "Field `BACKUP_BUS_PMS_MONITOR_VIOLATE_EN` writer - Set 1 to enable interrupt that BackUp initiate illegal access."]
12pub type BACKUP_BUS_PMS_MONITOR_VIOLATE_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14 #[doc = "Bit 0 - Set 1 to clear interrupt that BackUp initiate illegal access."]
15 #[inline(always)]
16 pub fn backup_bus_pms_monitor_violate_clr(&self) -> BACKUP_BUS_PMS_MONITOR_VIOLATE_CLR_R {
17 BACKUP_BUS_PMS_MONITOR_VIOLATE_CLR_R::new((self.bits & 1) != 0)
18 }
19 #[doc = "Bit 1 - Set 1 to enable interrupt that BackUp initiate illegal access."]
20 #[inline(always)]
21 pub fn backup_bus_pms_monitor_violate_en(&self) -> BACKUP_BUS_PMS_MONITOR_VIOLATE_EN_R {
22 BACKUP_BUS_PMS_MONITOR_VIOLATE_EN_R::new(((self.bits >> 1) & 1) != 0)
23 }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28 f.debug_struct("BACKUP_BUS_PMS_MONITOR_1")
29 .field(
30 "backup_bus_pms_monitor_violate_clr",
31 &self.backup_bus_pms_monitor_violate_clr(),
32 )
33 .field(
34 "backup_bus_pms_monitor_violate_en",
35 &self.backup_bus_pms_monitor_violate_en(),
36 )
37 .finish()
38 }
39}
40impl W {
41 #[doc = "Bit 0 - Set 1 to clear interrupt that BackUp initiate illegal access."]
42 #[inline(always)]
43 pub fn backup_bus_pms_monitor_violate_clr(
44 &mut self,
45 ) -> BACKUP_BUS_PMS_MONITOR_VIOLATE_CLR_W<BACKUP_BUS_PMS_MONITOR_1_SPEC> {
46 BACKUP_BUS_PMS_MONITOR_VIOLATE_CLR_W::new(self, 0)
47 }
48 #[doc = "Bit 1 - Set 1 to enable interrupt that BackUp initiate illegal access."]
49 #[inline(always)]
50 pub fn backup_bus_pms_monitor_violate_en(
51 &mut self,
52 ) -> BACKUP_BUS_PMS_MONITOR_VIOLATE_EN_W<BACKUP_BUS_PMS_MONITOR_1_SPEC> {
53 BACKUP_BUS_PMS_MONITOR_VIOLATE_EN_W::new(self, 1)
54 }
55}
56#[doc = "BackUp permission report register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`backup_bus_pms_monitor_1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`backup_bus_pms_monitor_1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
57pub struct BACKUP_BUS_PMS_MONITOR_1_SPEC;
58impl crate::RegisterSpec for BACKUP_BUS_PMS_MONITOR_1_SPEC {
59 type Ux = u32;
60}
61#[doc = "`read()` method returns [`backup_bus_pms_monitor_1::R`](R) reader structure"]
62impl crate::Readable for BACKUP_BUS_PMS_MONITOR_1_SPEC {}
63#[doc = "`write(|w| ..)` method takes [`backup_bus_pms_monitor_1::W`](W) writer structure"]
64impl crate::Writable for BACKUP_BUS_PMS_MONITOR_1_SPEC {
65 type Safety = crate::Unsafe;
66}
67#[doc = "`reset()` method sets BACKUP_BUS_PMS_MONITOR_1 to value 0x03"]
68impl crate::Resettable for BACKUP_BUS_PMS_MONITOR_1_SPEC {
69 const RESET_VALUE: u32 = 0x03;
70}