esp32s3/rtc_io/
rtc_gpio_status_w1ts.rs

1#[doc = "Register `RTC_GPIO_STATUS_W1TS` writer"]
2pub type W = crate::W<RTC_GPIO_STATUS_W1TS_SPEC>;
3#[doc = "Field `RTC_GPIO_STATUS_INT_W1TS` writer - RTC GPIO 0 ~ 21 interrupt status write 1 to set"]
4pub type RTC_GPIO_STATUS_INT_W1TS_W<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>;
5#[cfg(feature = "impl-register-debug")]
6impl core::fmt::Debug for crate::generic::Reg<RTC_GPIO_STATUS_W1TS_SPEC> {
7    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
8        write!(f, "(not readable)")
9    }
10}
11impl W {
12    #[doc = "Bits 10:31 - RTC GPIO 0 ~ 21 interrupt status write 1 to set"]
13    #[inline(always)]
14    pub fn rtc_gpio_status_int_w1ts(
15        &mut self,
16    ) -> RTC_GPIO_STATUS_INT_W1TS_W<RTC_GPIO_STATUS_W1TS_SPEC> {
17        RTC_GPIO_STATUS_INT_W1TS_W::new(self, 10)
18    }
19}
20#[doc = "One set RTC GPIO 0 ~ 21 interrupt status\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rtc_gpio_status_w1ts::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
21pub struct RTC_GPIO_STATUS_W1TS_SPEC;
22impl crate::RegisterSpec for RTC_GPIO_STATUS_W1TS_SPEC {
23    type Ux = u32;
24}
25#[doc = "`write(|w| ..)` method takes [`rtc_gpio_status_w1ts::W`](W) writer structure"]
26impl crate::Writable for RTC_GPIO_STATUS_W1TS_SPEC {
27    type Safety = crate::Unsafe;
28}
29#[doc = "`reset()` method sets RTC_GPIO_STATUS_W1TS to value 0"]
30impl crate::Resettable for RTC_GPIO_STATUS_W1TS_SPEC {}
esp32s3/rtc_io/rtc_gpio_status_w1ts.rs

esp32s3/rtc_io/
rtc_gpio_status_w1ts.rs
