esp32s3/system/
rsa_pd_ctrl.rs

1#[doc = "Register `RSA_PD_CTRL` reader"]
2pub type R = crate::R<RSA_PD_CTRL_SPEC>;
3#[doc = "Register `RSA_PD_CTRL` writer"]
4pub type W = crate::W<RSA_PD_CTRL_SPEC>;
5#[doc = "Field `RSA_MEM_PD` reader - Set 1 to power down RSA memory. This bit has the lowest priority.When Digital Signature occupies the RSA, this bit is invalid."]
6pub type RSA_MEM_PD_R = crate::BitReader;
7#[doc = "Field `RSA_MEM_PD` writer - Set 1 to power down RSA memory. This bit has the lowest priority.When Digital Signature occupies the RSA, this bit is invalid."]
8pub type RSA_MEM_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `RSA_MEM_FORCE_PU` reader - Set 1 to force power up RSA memory, this bit has the second highest priority."]
10pub type RSA_MEM_FORCE_PU_R = crate::BitReader;
11#[doc = "Field `RSA_MEM_FORCE_PU` writer - Set 1 to force power up RSA memory, this bit has the second highest priority."]
12pub type RSA_MEM_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `RSA_MEM_FORCE_PD` reader - Set 1 to force power down RSA memory,this bit has the highest priority."]
14pub type RSA_MEM_FORCE_PD_R = crate::BitReader;
15#[doc = "Field `RSA_MEM_FORCE_PD` writer - Set 1 to force power down RSA memory,this bit has the highest priority."]
16pub type RSA_MEM_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    #[doc = "Bit 0 - Set 1 to power down RSA memory. This bit has the lowest priority.When Digital Signature occupies the RSA, this bit is invalid."]
19    #[inline(always)]
20    pub fn rsa_mem_pd(&self) -> RSA_MEM_PD_R {
21        RSA_MEM_PD_R::new((self.bits & 1) != 0)
22    }
23    #[doc = "Bit 1 - Set 1 to force power up RSA memory, this bit has the second highest priority."]
24    #[inline(always)]
25    pub fn rsa_mem_force_pu(&self) -> RSA_MEM_FORCE_PU_R {
26        RSA_MEM_FORCE_PU_R::new(((self.bits >> 1) & 1) != 0)
27    }
28    #[doc = "Bit 2 - Set 1 to force power down RSA memory,this bit has the highest priority."]
29    #[inline(always)]
30    pub fn rsa_mem_force_pd(&self) -> RSA_MEM_FORCE_PD_R {
31        RSA_MEM_FORCE_PD_R::new(((self.bits >> 2) & 1) != 0)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("RSA_PD_CTRL")
38            .field("rsa_mem_pd", &self.rsa_mem_pd())
39            .field("rsa_mem_force_pu", &self.rsa_mem_force_pu())
40            .field("rsa_mem_force_pd", &self.rsa_mem_force_pd())
41            .finish()
42    }
43}
44impl W {
45    #[doc = "Bit 0 - Set 1 to power down RSA memory. This bit has the lowest priority.When Digital Signature occupies the RSA, this bit is invalid."]
46    #[inline(always)]
47    pub fn rsa_mem_pd(&mut self) -> RSA_MEM_PD_W<RSA_PD_CTRL_SPEC> {
48        RSA_MEM_PD_W::new(self, 0)
49    }
50    #[doc = "Bit 1 - Set 1 to force power up RSA memory, this bit has the second highest priority."]
51    #[inline(always)]
52    pub fn rsa_mem_force_pu(&mut self) -> RSA_MEM_FORCE_PU_W<RSA_PD_CTRL_SPEC> {
53        RSA_MEM_FORCE_PU_W::new(self, 1)
54    }
55    #[doc = "Bit 2 - Set 1 to force power down RSA memory,this bit has the highest priority."]
56    #[inline(always)]
57    pub fn rsa_mem_force_pd(&mut self) -> RSA_MEM_FORCE_PD_W<RSA_PD_CTRL_SPEC> {
58        RSA_MEM_FORCE_PD_W::new(self, 2)
59    }
60}
61#[doc = "rsa memory power control register\n\nYou can [`read`](crate::Reg::read) this register and get [`rsa_pd_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rsa_pd_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
62pub struct RSA_PD_CTRL_SPEC;
63impl crate::RegisterSpec for RSA_PD_CTRL_SPEC {
64    type Ux = u32;
65}
66#[doc = "`read()` method returns [`rsa_pd_ctrl::R`](R) reader structure"]
67impl crate::Readable for RSA_PD_CTRL_SPEC {}
68#[doc = "`write(|w| ..)` method takes [`rsa_pd_ctrl::W`](W) writer structure"]
69impl crate::Writable for RSA_PD_CTRL_SPEC {
70    type Safety = crate::Unsafe;
71    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
73}
74#[doc = "`reset()` method sets RSA_PD_CTRL to value 0x01"]
75impl crate::Resettable for RSA_PD_CTRL_SPEC {
76    const RESET_VALUE: u32 = 0x01;
77}
esp32s3/system/rsa_pd_ctrl.rs

esp32s3/system/
rsa_pd_ctrl.rs
