esp32s3/spi0/
int_st.rs

1#[doc = "Register `INT_ST` reader"]
2pub type R = crate::R<INT_ST_SPEC>;
3#[doc = "Field `TOTAL_TRANS_END` reader - The status bit for SPI_MEM_TOTAL_TRANS_END_INT interrupt."]
4pub type TOTAL_TRANS_END_R = crate::BitReader;
5#[doc = "Field `ECC_ERR` reader - The status bit for SPI_MEM_ECC_ERR_INT interrupt."]
6pub type ECC_ERR_R = crate::BitReader;
7impl R {
8    #[doc = "Bit 2 - The status bit for SPI_MEM_TOTAL_TRANS_END_INT interrupt."]
9    #[inline(always)]
10    pub fn total_trans_end(&self) -> TOTAL_TRANS_END_R {
11        TOTAL_TRANS_END_R::new(((self.bits >> 2) & 1) != 0)
12    }
13    #[doc = "Bit 4 - The status bit for SPI_MEM_ECC_ERR_INT interrupt."]
14    #[inline(always)]
15    pub fn ecc_err(&self) -> ECC_ERR_R {
16        ECC_ERR_R::new(((self.bits >> 4) & 1) != 0)
17    }
18}
19#[cfg(feature = "impl-register-debug")]
20impl core::fmt::Debug for R {
21    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
22        f.debug_struct("INT_ST")
23            .field("total_trans_end", &self.total_trans_end())
24            .field("ecc_err", &self.ecc_err())
25            .finish()
26    }
27}
28#[doc = "SPI1 interrupt status register\n\nYou can [`read`](crate::Reg::read) this register and get [`int_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
29pub struct INT_ST_SPEC;
30impl crate::RegisterSpec for INT_ST_SPEC {
31    type Ux = u32;
32}
33#[doc = "`read()` method returns [`int_st::R`](R) reader structure"]
34impl crate::Readable for INT_ST_SPEC {}
35#[doc = "`reset()` method sets INT_ST to value 0"]
36impl crate::Resettable for INT_ST_SPEC {
37    const RESET_VALUE: u32 = 0;
38}
esp32s3/spi0/int_st.rs

esp32s3/spi0/
int_st.rs
