esp32s3/sdhost/
ctype.rs

1#[doc = "Register `CTYPE` reader"]
2pub type R = crate::R<CTYPE_SPEC>;
3#[doc = "Register `CTYPE` writer"]
4pub type W = crate::W<CTYPE_SPEC>;
5#[doc = "Field `CARD_WIDTH4` reader - One bit per card indicates if card is 1-bit or 4-bit mode. 0: 1-bit mode; 1: 4-bit mode. Bit\\[1:0\\] correspond to card\\[1:0\\] respectively."]
6pub type CARD_WIDTH4_R = crate::FieldReader;
7#[doc = "Field `CARD_WIDTH4` writer - One bit per card indicates if card is 1-bit or 4-bit mode. 0: 1-bit mode; 1: 4-bit mode. Bit\\[1:0\\] correspond to card\\[1:0\\] respectively."]
8pub type CARD_WIDTH4_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `CARD_WIDTH8` reader - One bit per card indicates if card is in 8-bit mode. 0: Non 8-bit mode; 1: 8-bit mode. Bit\\[17:16\\] correspond to card\\[1:0\\] respectively."]
10pub type CARD_WIDTH8_R = crate::FieldReader;
11#[doc = "Field `CARD_WIDTH8` writer - One bit per card indicates if card is in 8-bit mode. 0: Non 8-bit mode; 1: 8-bit mode. Bit\\[17:16\\] correspond to card\\[1:0\\] respectively."]
12pub type CARD_WIDTH8_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13impl R {
14    #[doc = "Bits 0:1 - One bit per card indicates if card is 1-bit or 4-bit mode. 0: 1-bit mode; 1: 4-bit mode. Bit\\[1:0\\] correspond to card\\[1:0\\] respectively."]
15    #[inline(always)]
16    pub fn card_width4(&self) -> CARD_WIDTH4_R {
17        CARD_WIDTH4_R::new((self.bits & 3) as u8)
18    }
19    #[doc = "Bits 16:17 - One bit per card indicates if card is in 8-bit mode. 0: Non 8-bit mode; 1: 8-bit mode. Bit\\[17:16\\] correspond to card\\[1:0\\] respectively."]
20    #[inline(always)]
21    pub fn card_width8(&self) -> CARD_WIDTH8_R {
22        CARD_WIDTH8_R::new(((self.bits >> 16) & 3) as u8)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("CTYPE")
29            .field("card_width4", &self.card_width4())
30            .field("card_width8", &self.card_width8())
31            .finish()
32    }
33}
34impl W {
35    #[doc = "Bits 0:1 - One bit per card indicates if card is 1-bit or 4-bit mode. 0: 1-bit mode; 1: 4-bit mode. Bit\\[1:0\\] correspond to card\\[1:0\\] respectively."]
36    #[inline(always)]
37    pub fn card_width4(&mut self) -> CARD_WIDTH4_W<CTYPE_SPEC> {
38        CARD_WIDTH4_W::new(self, 0)
39    }
40    #[doc = "Bits 16:17 - One bit per card indicates if card is in 8-bit mode. 0: Non 8-bit mode; 1: 8-bit mode. Bit\\[17:16\\] correspond to card\\[1:0\\] respectively."]
41    #[inline(always)]
42    pub fn card_width8(&mut self) -> CARD_WIDTH8_W<CTYPE_SPEC> {
43        CARD_WIDTH8_W::new(self, 16)
44    }
45}
46#[doc = "Card bus width configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctype::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctype::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
47pub struct CTYPE_SPEC;
48impl crate::RegisterSpec for CTYPE_SPEC {
49    type Ux = u32;
50}
51#[doc = "`read()` method returns [`ctype::R`](R) reader structure"]
52impl crate::Readable for CTYPE_SPEC {}
53#[doc = "`write(|w| ..)` method takes [`ctype::W`](W) writer structure"]
54impl crate::Writable for CTYPE_SPEC {
55    type Safety = crate::Unsafe;
56    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
57    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
58}
59#[doc = "`reset()` method sets CTYPE to value 0"]
60impl crate::Resettable for CTYPE_SPEC {
61    const RESET_VALUE: u32 = 0;
62}
esp32s3/sdhost/ctype.rs

esp32s3/sdhost/
ctype.rs
