Module sram_cmd

Source
Expand description

SPI0 external RAM mode control register

Structs§

SRAM_CMD_SPEC
SPI0 external RAM mode control register

Type Aliases§

R
Register SRAM_CMD reader
SADDR_DUAL_R
Field SADDR_DUAL reader - When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in ADDR phase.
SADDR_DUAL_W
Field SADDR_DUAL writer - When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in ADDR phase.
SADDR_OCT_R
Field SADDR_OCT reader - When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in ADDR phase.
SADDR_OCT_W
Field SADDR_OCT writer - When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in ADDR phase.
SADDR_QUAD_R
Field SADDR_QUAD reader - When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in ADDR phase.
SADDR_QUAD_W
Field SADDR_QUAD writer - When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in ADDR phase.
SCLK_MODE_R
Field SCLK_MODE reader - SPI_CLK mode bits when SPI0 accesses to Ext_RAM. 0: SPI_CLK is off when CS inactive 1: SPI_CLK is delayed one cycle after CS inactive 2: SPI_CLK is delayed two cycles after CS inactive 3: SPI_CLK is always on.
SCLK_MODE_W
Field SCLK_MODE writer - SPI_CLK mode bits when SPI0 accesses to Ext_RAM. 0: SPI_CLK is off when CS inactive 1: SPI_CLK is delayed one cycle after CS inactive 2: SPI_CLK is delayed two cycles after CS inactive 3: SPI_CLK is always on.
SCMD_DUAL_R
Field SCMD_DUAL reader - When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in CMD phase.
SCMD_DUAL_W
Field SCMD_DUAL writer - When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in CMD phase.
SCMD_OCT_R
Field SCMD_OCT reader - When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in CMD phase.
SCMD_OCT_W
Field SCMD_OCT writer - When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in CMD phase.
SCMD_QUAD_R
Field SCMD_QUAD reader - When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in CMD phase.
SCMD_QUAD_W
Field SCMD_QUAD writer - When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in CMD phase.
SDIN_DUAL_R
Field SDIN_DUAL reader - When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in DIN phase.
SDIN_DUAL_W
Field SDIN_DUAL writer - When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in DIN phase.
SDIN_OCT_R
Field SDIN_OCT reader - When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in DIN phase.
SDIN_OCT_W
Field SDIN_OCT writer - When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in DIN phase.
SDIN_QUAD_R
Field SDIN_QUAD reader - When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in DIN phase.
SDIN_QUAD_W
Field SDIN_QUAD writer - When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in DIN phase.
SDOUT_DUAL_R
Field SDOUT_DUAL reader - When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in DOUT phase.
SDOUT_DUAL_W
Field SDOUT_DUAL writer - When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in DOUT phase.
SDOUT_OCT_R
Field SDOUT_OCT reader - When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in DOUT phase.
SDOUT_OCT_W
Field SDOUT_OCT writer - When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in DOUT phase.
SDOUT_QUAD_R
Field SDOUT_QUAD reader - When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in DOUT phase.
SDOUT_QUAD_W
Field SDOUT_QUAD writer - When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in DOUT phase.
SDUMMY_OUT_R
Field SDUMMY_OUT reader - When SPI0 accesses to Ext_RAM, in the DUMMY phase the signal level of SPI bus is output by the SPI0 controller.
SDUMMY_OUT_W
Field SDUMMY_OUT writer - When SPI0 accesses to Ext_RAM, in the DUMMY phase the signal level of SPI bus is output by the SPI0 controller.
SWB_MODE_R
Field SWB_MODE reader - Mode bits when SPI0 accesses to Ext_RAM.
SWB_MODE_W
Field SWB_MODE writer - Mode bits when SPI0 accesses to Ext_RAM.
W
Register SRAM_CMD writer