Module pin

GPIO pin configuration register

Structs

PIN_SPEC

GPIO pin configuration register

Type Aliases

CONFIG_R

Field CONFIG reader - reserved

CONFIG_W

Field CONFIG writer - reserved

INT_ENA_R

Field INT_ENA reader - set bit 13 to enable CPU interrupt. set bit 14 to enable CPU(not shielded) interrupt.

INT_ENA_W

Field INT_ENA writer - set bit 13 to enable CPU interrupt. set bit 14 to enable CPU(not shielded) interrupt.

INT_TYPE_R

Field INT_TYPE reader - set this value to choose interrupt mode. 0:disable GPIO interrupt. 1:trigger at posedge. 2:trigger at negedge. 3:trigger at any edge. 4:valid at low level. 5:valid at high level

INT_TYPE_W

Field INT_TYPE writer - set this value to choose interrupt mode. 0:disable GPIO interrupt. 1:trigger at posedge. 2:trigger at negedge. 3:trigger at any edge. 4:valid at low level. 5:valid at high level

PAD_DRIVER_R

Field PAD_DRIVER reader - set this bit to select pad driver. 1:open-drain. 0:normal.

PAD_DRIVER_W

Field PAD_DRIVER writer - set this bit to select pad driver. 1:open-drain. 0:normal.

R

Register PIN%s reader

SYNC1_BYPASS_R

Field SYNC1_BYPASS reader - set GPIO input_sync1 signal mode. 0:disable. 1:trigger at negedge. 2or3:trigger at posedge.

SYNC1_BYPASS_W

Field SYNC1_BYPASS writer - set GPIO input_sync1 signal mode. 0:disable. 1:trigger at negedge. 2or3:trigger at posedge.

SYNC2_BYPASS_R

Field SYNC2_BYPASS reader - set GPIO input_sync2 signal mode. 0:disable. 1:trigger at negedge. 2or3:trigger at posedge.

SYNC2_BYPASS_W

Field SYNC2_BYPASS writer - set GPIO input_sync2 signal mode. 0:disable. 1:trigger at negedge. 2or3:trigger at posedge.

W

Register PIN%s writer

WAKEUP_ENABLE_R

Field WAKEUP_ENABLE reader - set this bit to enable GPIO wakeup.(can only wakeup CPU from Light-sleep Mode)

WAKEUP_ENABLE_W

Field WAKEUP_ENABLE writer - set this bit to enable GPIO wakeup.(can only wakeup CPU from Light-sleep Mode)