1#[doc = "Register `OPTIONS0` reader"]
2pub type R = crate::R<OPTIONS0_SPEC>;
3#[doc = "Register `OPTIONS0` writer"]
4pub type W = crate::W<OPTIONS0_SPEC>;
5#[doc = "Field `SW_STALL_APPCPU_C0` reader - {reg_sw_stall_appcpu_c1\\[5:0\\], reg_sw_stall_appcpu_c0\\[1:0\\]} == 0x86 will stall APP CPU"]
6pub type SW_STALL_APPCPU_C0_R = crate::FieldReader;
7#[doc = "Field `SW_STALL_APPCPU_C0` writer - {reg_sw_stall_appcpu_c1\\[5:0\\], reg_sw_stall_appcpu_c0\\[1:0\\]} == 0x86 will stall APP CPU"]
8pub type SW_STALL_APPCPU_C0_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `SW_STALL_PROCPU_C0` reader - {reg_sw_stall_procpu_c1\\[5:0\\], reg_sw_stall_procpu_c0\\[1:0\\]} == 0x86 will stall PRO CPU"]
10pub type SW_STALL_PROCPU_C0_R = crate::FieldReader;
11#[doc = "Field `SW_STALL_PROCPU_C0` writer - {reg_sw_stall_procpu_c1\\[5:0\\], reg_sw_stall_procpu_c0\\[1:0\\]} == 0x86 will stall PRO CPU"]
12pub type SW_STALL_PROCPU_C0_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13#[doc = "Field `SW_APPCPU_RST` writer - APP CPU SW reset"]
14pub type SW_APPCPU_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `SW_PROCPU_RST` writer - PRO CPU SW reset"]
16pub type SW_PROCPU_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `BB_I2C_FORCE_PD` reader - BB_I2C force power down"]
18pub type BB_I2C_FORCE_PD_R = crate::BitReader;
19#[doc = "Field `BB_I2C_FORCE_PD` writer - BB_I2C force power down"]
20pub type BB_I2C_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `BB_I2C_FORCE_PU` reader - BB_I2C force power up"]
22pub type BB_I2C_FORCE_PU_R = crate::BitReader;
23#[doc = "Field `BB_I2C_FORCE_PU` writer - BB_I2C force power up"]
24pub type BB_I2C_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `BBPLL_I2C_FORCE_PD` reader - BB_PLL _I2C force power down"]
26pub type BBPLL_I2C_FORCE_PD_R = crate::BitReader;
27#[doc = "Field `BBPLL_I2C_FORCE_PD` writer - BB_PLL _I2C force power down"]
28pub type BBPLL_I2C_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `BBPLL_I2C_FORCE_PU` reader - BB_PLL_I2C force power up"]
30pub type BBPLL_I2C_FORCE_PU_R = crate::BitReader;
31#[doc = "Field `BBPLL_I2C_FORCE_PU` writer - BB_PLL_I2C force power up"]
32pub type BBPLL_I2C_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `BBPLL_FORCE_PD` reader - BB_PLL force power down"]
34pub type BBPLL_FORCE_PD_R = crate::BitReader;
35#[doc = "Field `BBPLL_FORCE_PD` writer - BB_PLL force power down"]
36pub type BBPLL_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `BBPLL_FORCE_PU` reader - BB_PLL force power up"]
38pub type BBPLL_FORCE_PU_R = crate::BitReader;
39#[doc = "Field `BBPLL_FORCE_PU` writer - BB_PLL force power up"]
40pub type BBPLL_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `XTL_FORCE_PD` reader - crystall force power down"]
42pub type XTL_FORCE_PD_R = crate::BitReader;
43#[doc = "Field `XTL_FORCE_PD` writer - crystall force power down"]
44pub type XTL_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `XTL_FORCE_PU` reader - crystall force power up"]
46pub type XTL_FORCE_PU_R = crate::BitReader;
47#[doc = "Field `XTL_FORCE_PU` writer - crystall force power up"]
48pub type XTL_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `XTL_EN_WAIT` reader - wait bias_sleep and current source wakeup"]
50pub type XTL_EN_WAIT_R = crate::FieldReader;
51#[doc = "Field `XTL_EN_WAIT` writer - wait bias_sleep and current source wakeup"]
52pub type XTL_EN_WAIT_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
53#[doc = "Field `XTL_FORCE_ISO` reader - No public"]
54pub type XTL_FORCE_ISO_R = crate::BitReader;
55#[doc = "Field `XTL_FORCE_ISO` writer - No public"]
56pub type XTL_FORCE_ISO_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `PLL_FORCE_ISO` reader - No public"]
58pub type PLL_FORCE_ISO_R = crate::BitReader;
59#[doc = "Field `PLL_FORCE_ISO` writer - No public"]
60pub type PLL_FORCE_ISO_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `ANALOG_FORCE_ISO` reader - No public"]
62pub type ANALOG_FORCE_ISO_R = crate::BitReader;
63#[doc = "Field `ANALOG_FORCE_ISO` writer - No public"]
64pub type ANALOG_FORCE_ISO_W<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `XTL_FORCE_NOISO` reader - No public"]
66pub type XTL_FORCE_NOISO_R = crate::BitReader;
67#[doc = "Field `XTL_FORCE_NOISO` writer - No public"]
68pub type XTL_FORCE_NOISO_W<'a, REG> = crate::BitWriter<'a, REG>;
69#[doc = "Field `PLL_FORCE_NOISO` reader - No public"]
70pub type PLL_FORCE_NOISO_R = crate::BitReader;
71#[doc = "Field `PLL_FORCE_NOISO` writer - No public"]
72pub type PLL_FORCE_NOISO_W<'a, REG> = crate::BitWriter<'a, REG>;
73#[doc = "Field `ANALOG_FORCE_NOISO` reader - No public"]
74pub type ANALOG_FORCE_NOISO_R = crate::BitReader;
75#[doc = "Field `ANALOG_FORCE_NOISO` writer - No public"]
76pub type ANALOG_FORCE_NOISO_W<'a, REG> = crate::BitWriter<'a, REG>;
77#[doc = "Field `DG_WRAP_FORCE_RST` reader - digital wrap force reset in deep sleep"]
78pub type DG_WRAP_FORCE_RST_R = crate::BitReader;
79#[doc = "Field `DG_WRAP_FORCE_RST` writer - digital wrap force reset in deep sleep"]
80pub type DG_WRAP_FORCE_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
81#[doc = "Field `DG_WRAP_FORCE_NORST` reader - digital core force no reset in deep sleep"]
82pub type DG_WRAP_FORCE_NORST_R = crate::BitReader;
83#[doc = "Field `DG_WRAP_FORCE_NORST` writer - digital core force no reset in deep sleep"]
84pub type DG_WRAP_FORCE_NORST_W<'a, REG> = crate::BitWriter<'a, REG>;
85#[doc = "Field `SW_SYS_RST` writer - SW system reset"]
86pub type SW_SYS_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
87impl R {
88 #[doc = "Bits 0:1 - {reg_sw_stall_appcpu_c1\\[5:0\\], reg_sw_stall_appcpu_c0\\[1:0\\]} == 0x86 will stall APP CPU"]
89 #[inline(always)]
90 pub fn sw_stall_appcpu_c0(&self) -> SW_STALL_APPCPU_C0_R {
91 SW_STALL_APPCPU_C0_R::new((self.bits & 3) as u8)
92 }
93 #[doc = "Bits 2:3 - {reg_sw_stall_procpu_c1\\[5:0\\], reg_sw_stall_procpu_c0\\[1:0\\]} == 0x86 will stall PRO CPU"]
94 #[inline(always)]
95 pub fn sw_stall_procpu_c0(&self) -> SW_STALL_PROCPU_C0_R {
96 SW_STALL_PROCPU_C0_R::new(((self.bits >> 2) & 3) as u8)
97 }
98 #[doc = "Bit 6 - BB_I2C force power down"]
99 #[inline(always)]
100 pub fn bb_i2c_force_pd(&self) -> BB_I2C_FORCE_PD_R {
101 BB_I2C_FORCE_PD_R::new(((self.bits >> 6) & 1) != 0)
102 }
103 #[doc = "Bit 7 - BB_I2C force power up"]
104 #[inline(always)]
105 pub fn bb_i2c_force_pu(&self) -> BB_I2C_FORCE_PU_R {
106 BB_I2C_FORCE_PU_R::new(((self.bits >> 7) & 1) != 0)
107 }
108 #[doc = "Bit 8 - BB_PLL _I2C force power down"]
109 #[inline(always)]
110 pub fn bbpll_i2c_force_pd(&self) -> BBPLL_I2C_FORCE_PD_R {
111 BBPLL_I2C_FORCE_PD_R::new(((self.bits >> 8) & 1) != 0)
112 }
113 #[doc = "Bit 9 - BB_PLL_I2C force power up"]
114 #[inline(always)]
115 pub fn bbpll_i2c_force_pu(&self) -> BBPLL_I2C_FORCE_PU_R {
116 BBPLL_I2C_FORCE_PU_R::new(((self.bits >> 9) & 1) != 0)
117 }
118 #[doc = "Bit 10 - BB_PLL force power down"]
119 #[inline(always)]
120 pub fn bbpll_force_pd(&self) -> BBPLL_FORCE_PD_R {
121 BBPLL_FORCE_PD_R::new(((self.bits >> 10) & 1) != 0)
122 }
123 #[doc = "Bit 11 - BB_PLL force power up"]
124 #[inline(always)]
125 pub fn bbpll_force_pu(&self) -> BBPLL_FORCE_PU_R {
126 BBPLL_FORCE_PU_R::new(((self.bits >> 11) & 1) != 0)
127 }
128 #[doc = "Bit 12 - crystall force power down"]
129 #[inline(always)]
130 pub fn xtl_force_pd(&self) -> XTL_FORCE_PD_R {
131 XTL_FORCE_PD_R::new(((self.bits >> 12) & 1) != 0)
132 }
133 #[doc = "Bit 13 - crystall force power up"]
134 #[inline(always)]
135 pub fn xtl_force_pu(&self) -> XTL_FORCE_PU_R {
136 XTL_FORCE_PU_R::new(((self.bits >> 13) & 1) != 0)
137 }
138 #[doc = "Bits 14:17 - wait bias_sleep and current source wakeup"]
139 #[inline(always)]
140 pub fn xtl_en_wait(&self) -> XTL_EN_WAIT_R {
141 XTL_EN_WAIT_R::new(((self.bits >> 14) & 0x0f) as u8)
142 }
143 #[doc = "Bit 23 - No public"]
144 #[inline(always)]
145 pub fn xtl_force_iso(&self) -> XTL_FORCE_ISO_R {
146 XTL_FORCE_ISO_R::new(((self.bits >> 23) & 1) != 0)
147 }
148 #[doc = "Bit 24 - No public"]
149 #[inline(always)]
150 pub fn pll_force_iso(&self) -> PLL_FORCE_ISO_R {
151 PLL_FORCE_ISO_R::new(((self.bits >> 24) & 1) != 0)
152 }
153 #[doc = "Bit 25 - No public"]
154 #[inline(always)]
155 pub fn analog_force_iso(&self) -> ANALOG_FORCE_ISO_R {
156 ANALOG_FORCE_ISO_R::new(((self.bits >> 25) & 1) != 0)
157 }
158 #[doc = "Bit 26 - No public"]
159 #[inline(always)]
160 pub fn xtl_force_noiso(&self) -> XTL_FORCE_NOISO_R {
161 XTL_FORCE_NOISO_R::new(((self.bits >> 26) & 1) != 0)
162 }
163 #[doc = "Bit 27 - No public"]
164 #[inline(always)]
165 pub fn pll_force_noiso(&self) -> PLL_FORCE_NOISO_R {
166 PLL_FORCE_NOISO_R::new(((self.bits >> 27) & 1) != 0)
167 }
168 #[doc = "Bit 28 - No public"]
169 #[inline(always)]
170 pub fn analog_force_noiso(&self) -> ANALOG_FORCE_NOISO_R {
171 ANALOG_FORCE_NOISO_R::new(((self.bits >> 28) & 1) != 0)
172 }
173 #[doc = "Bit 29 - digital wrap force reset in deep sleep"]
174 #[inline(always)]
175 pub fn dg_wrap_force_rst(&self) -> DG_WRAP_FORCE_RST_R {
176 DG_WRAP_FORCE_RST_R::new(((self.bits >> 29) & 1) != 0)
177 }
178 #[doc = "Bit 30 - digital core force no reset in deep sleep"]
179 #[inline(always)]
180 pub fn dg_wrap_force_norst(&self) -> DG_WRAP_FORCE_NORST_R {
181 DG_WRAP_FORCE_NORST_R::new(((self.bits >> 30) & 1) != 0)
182 }
183}
184#[cfg(feature = "impl-register-debug")]
185impl core::fmt::Debug for R {
186 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
187 f.debug_struct("OPTIONS0")
188 .field("sw_stall_appcpu_c0", &self.sw_stall_appcpu_c0())
189 .field("sw_stall_procpu_c0", &self.sw_stall_procpu_c0())
190 .field("bb_i2c_force_pd", &self.bb_i2c_force_pd())
191 .field("bb_i2c_force_pu", &self.bb_i2c_force_pu())
192 .field("bbpll_i2c_force_pd", &self.bbpll_i2c_force_pd())
193 .field("bbpll_i2c_force_pu", &self.bbpll_i2c_force_pu())
194 .field("bbpll_force_pd", &self.bbpll_force_pd())
195 .field("bbpll_force_pu", &self.bbpll_force_pu())
196 .field("xtl_force_pd", &self.xtl_force_pd())
197 .field("xtl_force_pu", &self.xtl_force_pu())
198 .field("xtl_en_wait", &self.xtl_en_wait())
199 .field("xtl_force_iso", &self.xtl_force_iso())
200 .field("pll_force_iso", &self.pll_force_iso())
201 .field("analog_force_iso", &self.analog_force_iso())
202 .field("xtl_force_noiso", &self.xtl_force_noiso())
203 .field("pll_force_noiso", &self.pll_force_noiso())
204 .field("analog_force_noiso", &self.analog_force_noiso())
205 .field("dg_wrap_force_rst", &self.dg_wrap_force_rst())
206 .field("dg_wrap_force_norst", &self.dg_wrap_force_norst())
207 .finish()
208 }
209}
210impl W {
211 #[doc = "Bits 0:1 - {reg_sw_stall_appcpu_c1\\[5:0\\], reg_sw_stall_appcpu_c0\\[1:0\\]} == 0x86 will stall APP CPU"]
212 #[inline(always)]
213 pub fn sw_stall_appcpu_c0(&mut self) -> SW_STALL_APPCPU_C0_W<OPTIONS0_SPEC> {
214 SW_STALL_APPCPU_C0_W::new(self, 0)
215 }
216 #[doc = "Bits 2:3 - {reg_sw_stall_procpu_c1\\[5:0\\], reg_sw_stall_procpu_c0\\[1:0\\]} == 0x86 will stall PRO CPU"]
217 #[inline(always)]
218 pub fn sw_stall_procpu_c0(&mut self) -> SW_STALL_PROCPU_C0_W<OPTIONS0_SPEC> {
219 SW_STALL_PROCPU_C0_W::new(self, 2)
220 }
221 #[doc = "Bit 4 - APP CPU SW reset"]
222 #[inline(always)]
223 pub fn sw_appcpu_rst(&mut self) -> SW_APPCPU_RST_W<OPTIONS0_SPEC> {
224 SW_APPCPU_RST_W::new(self, 4)
225 }
226 #[doc = "Bit 5 - PRO CPU SW reset"]
227 #[inline(always)]
228 pub fn sw_procpu_rst(&mut self) -> SW_PROCPU_RST_W<OPTIONS0_SPEC> {
229 SW_PROCPU_RST_W::new(self, 5)
230 }
231 #[doc = "Bit 6 - BB_I2C force power down"]
232 #[inline(always)]
233 pub fn bb_i2c_force_pd(&mut self) -> BB_I2C_FORCE_PD_W<OPTIONS0_SPEC> {
234 BB_I2C_FORCE_PD_W::new(self, 6)
235 }
236 #[doc = "Bit 7 - BB_I2C force power up"]
237 #[inline(always)]
238 pub fn bb_i2c_force_pu(&mut self) -> BB_I2C_FORCE_PU_W<OPTIONS0_SPEC> {
239 BB_I2C_FORCE_PU_W::new(self, 7)
240 }
241 #[doc = "Bit 8 - BB_PLL _I2C force power down"]
242 #[inline(always)]
243 pub fn bbpll_i2c_force_pd(&mut self) -> BBPLL_I2C_FORCE_PD_W<OPTIONS0_SPEC> {
244 BBPLL_I2C_FORCE_PD_W::new(self, 8)
245 }
246 #[doc = "Bit 9 - BB_PLL_I2C force power up"]
247 #[inline(always)]
248 pub fn bbpll_i2c_force_pu(&mut self) -> BBPLL_I2C_FORCE_PU_W<OPTIONS0_SPEC> {
249 BBPLL_I2C_FORCE_PU_W::new(self, 9)
250 }
251 #[doc = "Bit 10 - BB_PLL force power down"]
252 #[inline(always)]
253 pub fn bbpll_force_pd(&mut self) -> BBPLL_FORCE_PD_W<OPTIONS0_SPEC> {
254 BBPLL_FORCE_PD_W::new(self, 10)
255 }
256 #[doc = "Bit 11 - BB_PLL force power up"]
257 #[inline(always)]
258 pub fn bbpll_force_pu(&mut self) -> BBPLL_FORCE_PU_W<OPTIONS0_SPEC> {
259 BBPLL_FORCE_PU_W::new(self, 11)
260 }
261 #[doc = "Bit 12 - crystall force power down"]
262 #[inline(always)]
263 pub fn xtl_force_pd(&mut self) -> XTL_FORCE_PD_W<OPTIONS0_SPEC> {
264 XTL_FORCE_PD_W::new(self, 12)
265 }
266 #[doc = "Bit 13 - crystall force power up"]
267 #[inline(always)]
268 pub fn xtl_force_pu(&mut self) -> XTL_FORCE_PU_W<OPTIONS0_SPEC> {
269 XTL_FORCE_PU_W::new(self, 13)
270 }
271 #[doc = "Bits 14:17 - wait bias_sleep and current source wakeup"]
272 #[inline(always)]
273 pub fn xtl_en_wait(&mut self) -> XTL_EN_WAIT_W<OPTIONS0_SPEC> {
274 XTL_EN_WAIT_W::new(self, 14)
275 }
276 #[doc = "Bit 23 - No public"]
277 #[inline(always)]
278 pub fn xtl_force_iso(&mut self) -> XTL_FORCE_ISO_W<OPTIONS0_SPEC> {
279 XTL_FORCE_ISO_W::new(self, 23)
280 }
281 #[doc = "Bit 24 - No public"]
282 #[inline(always)]
283 pub fn pll_force_iso(&mut self) -> PLL_FORCE_ISO_W<OPTIONS0_SPEC> {
284 PLL_FORCE_ISO_W::new(self, 24)
285 }
286 #[doc = "Bit 25 - No public"]
287 #[inline(always)]
288 pub fn analog_force_iso(&mut self) -> ANALOG_FORCE_ISO_W<OPTIONS0_SPEC> {
289 ANALOG_FORCE_ISO_W::new(self, 25)
290 }
291 #[doc = "Bit 26 - No public"]
292 #[inline(always)]
293 pub fn xtl_force_noiso(&mut self) -> XTL_FORCE_NOISO_W<OPTIONS0_SPEC> {
294 XTL_FORCE_NOISO_W::new(self, 26)
295 }
296 #[doc = "Bit 27 - No public"]
297 #[inline(always)]
298 pub fn pll_force_noiso(&mut self) -> PLL_FORCE_NOISO_W<OPTIONS0_SPEC> {
299 PLL_FORCE_NOISO_W::new(self, 27)
300 }
301 #[doc = "Bit 28 - No public"]
302 #[inline(always)]
303 pub fn analog_force_noiso(&mut self) -> ANALOG_FORCE_NOISO_W<OPTIONS0_SPEC> {
304 ANALOG_FORCE_NOISO_W::new(self, 28)
305 }
306 #[doc = "Bit 29 - digital wrap force reset in deep sleep"]
307 #[inline(always)]
308 pub fn dg_wrap_force_rst(&mut self) -> DG_WRAP_FORCE_RST_W<OPTIONS0_SPEC> {
309 DG_WRAP_FORCE_RST_W::new(self, 29)
310 }
311 #[doc = "Bit 30 - digital core force no reset in deep sleep"]
312 #[inline(always)]
313 pub fn dg_wrap_force_norst(&mut self) -> DG_WRAP_FORCE_NORST_W<OPTIONS0_SPEC> {
314 DG_WRAP_FORCE_NORST_W::new(self, 30)
315 }
316 #[doc = "Bit 31 - SW system reset"]
317 #[inline(always)]
318 pub fn sw_sys_rst(&mut self) -> SW_SYS_RST_W<OPTIONS0_SPEC> {
319 SW_SYS_RST_W::new(self, 31)
320 }
321}
322#[doc = "RTC common configure register\n\nYou can [`read`](crate::Reg::read) this register and get [`options0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`options0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
323pub struct OPTIONS0_SPEC;
324impl crate::RegisterSpec for OPTIONS0_SPEC {
325 type Ux = u32;
326}
327#[doc = "`read()` method returns [`options0::R`](R) reader structure"]
328impl crate::Readable for OPTIONS0_SPEC {}
329#[doc = "`write(|w| ..)` method takes [`options0::W`](W) writer structure"]
330impl crate::Writable for OPTIONS0_SPEC {
331 type Safety = crate::Unsafe;
332 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
333 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
334}
335#[doc = "`reset()` method sets OPTIONS0 to value 0x1c00_a000"]
336impl crate::Resettable for OPTIONS0_SPEC {
337 const RESET_VALUE: u32 = 0x1c00_a000;
338}