esp32s3/io_mux/
pin_ctrl.rs

1#[doc = "Register `PIN_CTRL` reader"]
2pub type R = crate::R<PIN_CTRL_SPEC>;
3#[doc = "Register `PIN_CTRL` writer"]
4pub type W = crate::W<PIN_CTRL_SPEC>;
5#[doc = "Field `CLK_OUT1` reader - If you want to output clock for I2S to CLK_OUT_out1, set this register to 0x0. CLK_OUT_out1 can be found in peripheral output signals."]
6pub type CLK_OUT1_R = crate::FieldReader;
7#[doc = "Field `CLK_OUT1` writer - If you want to output clock for I2S to CLK_OUT_out1, set this register to 0x0. CLK_OUT_out1 can be found in peripheral output signals."]
8pub type CLK_OUT1_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
9#[doc = "Field `CLK_OUT2` reader - If you want to output clock for I2S to CLK_OUT_out2, set this register to 0x0. CLK_OUT_out2 can be found in peripheral output signals."]
10pub type CLK_OUT2_R = crate::FieldReader;
11#[doc = "Field `CLK_OUT2` writer - If you want to output clock for I2S to CLK_OUT_out2, set this register to 0x0. CLK_OUT_out2 can be found in peripheral output signals."]
12pub type CLK_OUT2_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
13#[doc = "Field `CLK_OUT3` reader - If you want to output clock for I2S to CLK_OUT_out3, set this register to 0x0. CLK_OUT_out3 can be found in peripheral output signals."]
14pub type CLK_OUT3_R = crate::FieldReader;
15#[doc = "Field `CLK_OUT3` writer - If you want to output clock for I2S to CLK_OUT_out3, set this register to 0x0. CLK_OUT_out3 can be found in peripheral output signals."]
16pub type CLK_OUT3_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
17impl R {
18    #[doc = "Bits 0:3 - If you want to output clock for I2S to CLK_OUT_out1, set this register to 0x0. CLK_OUT_out1 can be found in peripheral output signals."]
19    #[inline(always)]
20    pub fn clk_out1(&self) -> CLK_OUT1_R {
21        CLK_OUT1_R::new((self.bits & 0x0f) as u8)
22    }
23    #[doc = "Bits 4:7 - If you want to output clock for I2S to CLK_OUT_out2, set this register to 0x0. CLK_OUT_out2 can be found in peripheral output signals."]
24    #[inline(always)]
25    pub fn clk_out2(&self) -> CLK_OUT2_R {
26        CLK_OUT2_R::new(((self.bits >> 4) & 0x0f) as u8)
27    }
28    #[doc = "Bits 8:11 - If you want to output clock for I2S to CLK_OUT_out3, set this register to 0x0. CLK_OUT_out3 can be found in peripheral output signals."]
29    #[inline(always)]
30    pub fn clk_out3(&self) -> CLK_OUT3_R {
31        CLK_OUT3_R::new(((self.bits >> 8) & 0x0f) as u8)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("PIN_CTRL")
38            .field("clk_out1", &self.clk_out1())
39            .field("clk_out2", &self.clk_out2())
40            .field("clk_out3", &self.clk_out3())
41            .finish()
42    }
43}
44impl W {
45    #[doc = "Bits 0:3 - If you want to output clock for I2S to CLK_OUT_out1, set this register to 0x0. CLK_OUT_out1 can be found in peripheral output signals."]
46    #[inline(always)]
47    pub fn clk_out1(&mut self) -> CLK_OUT1_W<PIN_CTRL_SPEC> {
48        CLK_OUT1_W::new(self, 0)
49    }
50    #[doc = "Bits 4:7 - If you want to output clock for I2S to CLK_OUT_out2, set this register to 0x0. CLK_OUT_out2 can be found in peripheral output signals."]
51    #[inline(always)]
52    pub fn clk_out2(&mut self) -> CLK_OUT2_W<PIN_CTRL_SPEC> {
53        CLK_OUT2_W::new(self, 4)
54    }
55    #[doc = "Bits 8:11 - If you want to output clock for I2S to CLK_OUT_out3, set this register to 0x0. CLK_OUT_out3 can be found in peripheral output signals."]
56    #[inline(always)]
57    pub fn clk_out3(&mut self) -> CLK_OUT3_W<PIN_CTRL_SPEC> {
58        CLK_OUT3_W::new(self, 8)
59    }
60}
61#[doc = "Clock Output Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pin_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pin_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
62pub struct PIN_CTRL_SPEC;
63impl crate::RegisterSpec for PIN_CTRL_SPEC {
64    type Ux = u32;
65}
66#[doc = "`read()` method returns [`pin_ctrl::R`](R) reader structure"]
67impl crate::Readable for PIN_CTRL_SPEC {}
68#[doc = "`write(|w| ..)` method takes [`pin_ctrl::W`](W) writer structure"]
69impl crate::Writable for PIN_CTRL_SPEC {
70    type Safety = crate::Unsafe;
71    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
73}
74#[doc = "`reset()` method sets PIN_CTRL to value 0x07ff"]
75impl crate::Resettable for PIN_CTRL_SPEC {
76    const RESET_VALUE: u32 = 0x07ff;
77}
esp32s3/io_mux/pin_ctrl.rs

esp32s3/io_mux/
pin_ctrl.rs
