esp32s3/interrupt_core1/
app_intr_status_0.rs

1#[doc = "Register `APP_INTR_STATUS_0` reader"]
2pub type R = crate::R<APP_INTR_STATUS_0_SPEC>;
3#[doc = "Field `INTR_STATUS_0` reader - this register store the status of the first 32 interrupt source"]
4pub type INTR_STATUS_0_R = crate::FieldReader<u32>;
5impl R {
6    #[doc = "Bits 0:31 - this register store the status of the first 32 interrupt source"]
7    #[inline(always)]
8    pub fn intr_status_0(&self) -> INTR_STATUS_0_R {
9        INTR_STATUS_0_R::new(self.bits)
10    }
11}
12#[cfg(feature = "impl-register-debug")]
13impl core::fmt::Debug for R {
14    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
15        f.debug_struct("APP_INTR_STATUS_0")
16            .field("intr_status_0", &self.intr_status_0())
17            .finish()
18    }
19}
20#[doc = "interrupt status register\n\nYou can [`read`](crate::Reg::read) this register and get [`app_intr_status_0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
21pub struct APP_INTR_STATUS_0_SPEC;
22impl crate::RegisterSpec for APP_INTR_STATUS_0_SPEC {
23    type Ux = u32;
24}
25#[doc = "`read()` method returns [`app_intr_status_0::R`](R) reader structure"]
26impl crate::Readable for APP_INTR_STATUS_0_SPEC {}
27#[doc = "`reset()` method sets APP_INTR_STATUS_0 to value 0"]
28impl crate::Resettable for APP_INTR_STATUS_0_SPEC {
29    const RESET_VALUE: u32 = 0;
30}
esp32s3/interrupt_core1/app_intr_status_0.rs

esp32s3/interrupt_core1/
app_intr_status_0.rs
