esp32s3/gpio/
func_in_sel_cfg.rs1#[doc = "Register `FUNC%s_IN_SEL_CFG` reader"]
2pub type R = crate::R<FUNC_IN_SEL_CFG_SPEC>;
3#[doc = "Register `FUNC%s_IN_SEL_CFG` writer"]
4pub type W = crate::W<FUNC_IN_SEL_CFG_SPEC>;
5#[doc = "Field `IN_SEL` reader - set this value: s=0-53: connect GPIO\\[s\\] to this port. s=0x38: set this port always high level. s=0x3C: set this port always low level."]
6pub type IN_SEL_R = crate::FieldReader;
7#[doc = "Field `IN_SEL` writer - set this value: s=0-53: connect GPIO\\[s\\] to this port. s=0x38: set this port always high level. s=0x3C: set this port always low level."]
8pub type IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>;
9#[doc = "Field `IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."]
10pub type IN_INV_SEL_R = crate::BitReader;
11#[doc = "Field `IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."]
12pub type IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."]
14pub type SEL_R = crate::BitReader;
15#[doc = "Field `SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."]
16pub type SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18 #[doc = "Bits 0:5 - set this value: s=0-53: connect GPIO\\[s\\] to this port. s=0x38: set this port always high level. s=0x3C: set this port always low level."]
19 #[inline(always)]
20 pub fn in_sel(&self) -> IN_SEL_R {
21 IN_SEL_R::new((self.bits & 0x3f) as u8)
22 }
23 #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."]
24 #[inline(always)]
25 pub fn in_inv_sel(&self) -> IN_INV_SEL_R {
26 IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0)
27 }
28 #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."]
29 #[inline(always)]
30 pub fn sel(&self) -> SEL_R {
31 SEL_R::new(((self.bits >> 7) & 1) != 0)
32 }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37 f.debug_struct("FUNC_IN_SEL_CFG")
38 .field("in_sel", &self.in_sel())
39 .field("in_inv_sel", &self.in_inv_sel())
40 .field("sel", &self.sel())
41 .finish()
42 }
43}
44impl W {
45 #[doc = "Bits 0:5 - set this value: s=0-53: connect GPIO\\[s\\] to this port. s=0x38: set this port always high level. s=0x3C: set this port always low level."]
46 #[inline(always)]
47 pub fn in_sel(&mut self) -> IN_SEL_W<FUNC_IN_SEL_CFG_SPEC> {
48 IN_SEL_W::new(self, 0)
49 }
50 #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."]
51 #[inline(always)]
52 pub fn in_inv_sel(&mut self) -> IN_INV_SEL_W<FUNC_IN_SEL_CFG_SPEC> {
53 IN_INV_SEL_W::new(self, 6)
54 }
55 #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."]
56 #[inline(always)]
57 pub fn sel(&mut self) -> SEL_W<FUNC_IN_SEL_CFG_SPEC> {
58 SEL_W::new(self, 7)
59 }
60}
61#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`func_in_sel_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`func_in_sel_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
62pub struct FUNC_IN_SEL_CFG_SPEC;
63impl crate::RegisterSpec for FUNC_IN_SEL_CFG_SPEC {
64 type Ux = u32;
65}
66#[doc = "`read()` method returns [`func_in_sel_cfg::R`](R) reader structure"]
67impl crate::Readable for FUNC_IN_SEL_CFG_SPEC {}
68#[doc = "`write(|w| ..)` method takes [`func_in_sel_cfg::W`](W) writer structure"]
69impl crate::Writable for FUNC_IN_SEL_CFG_SPEC {
70 type Safety = crate::Unsafe;
71 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
73}
74#[doc = "`reset()` method sets FUNC%s_IN_SEL_CFG to value 0"]
75impl crate::Resettable for FUNC_IN_SEL_CFG_SPEC {
76 const RESET_VALUE: u32 = 0;
77}