1#[doc = "Register `PD_CONF` reader"]
2pub type R = crate::R<PD_CONF_SPEC>;
3#[doc = "Register `PD_CONF` writer"]
4pub type W = crate::W<PD_CONF_SPEC>;
5#[doc = "Field `DMA_RAM_FORCE_PD` reader - Set this bit to force power down DMA internal memory."]
6pub type DMA_RAM_FORCE_PD_R = crate::BitReader;
7#[doc = "Field `DMA_RAM_FORCE_PD` writer - Set this bit to force power down DMA internal memory."]
8pub type DMA_RAM_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `DMA_RAM_FORCE_PU` reader - Set this bit to force power up DMA internal memory"]
10pub type DMA_RAM_FORCE_PU_R = crate::BitReader;
11#[doc = "Field `DMA_RAM_FORCE_PU` writer - Set this bit to force power up DMA internal memory"]
12pub type DMA_RAM_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `DMA_RAM_CLK_FO` reader - 1: Force to open the clock and bypass the gate-clock when accessing the RAM in DMA. 0: A gate-clock will be used when accessing the RAM in DMA."]
14pub type DMA_RAM_CLK_FO_R = crate::BitReader;
15#[doc = "Field `DMA_RAM_CLK_FO` writer - 1: Force to open the clock and bypass the gate-clock when accessing the RAM in DMA. 0: A gate-clock will be used when accessing the RAM in DMA."]
16pub type DMA_RAM_CLK_FO_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18 #[doc = "Bit 4 - Set this bit to force power down DMA internal memory."]
19 #[inline(always)]
20 pub fn dma_ram_force_pd(&self) -> DMA_RAM_FORCE_PD_R {
21 DMA_RAM_FORCE_PD_R::new(((self.bits >> 4) & 1) != 0)
22 }
23 #[doc = "Bit 5 - Set this bit to force power up DMA internal memory"]
24 #[inline(always)]
25 pub fn dma_ram_force_pu(&self) -> DMA_RAM_FORCE_PU_R {
26 DMA_RAM_FORCE_PU_R::new(((self.bits >> 5) & 1) != 0)
27 }
28 #[doc = "Bit 6 - 1: Force to open the clock and bypass the gate-clock when accessing the RAM in DMA. 0: A gate-clock will be used when accessing the RAM in DMA."]
29 #[inline(always)]
30 pub fn dma_ram_clk_fo(&self) -> DMA_RAM_CLK_FO_R {
31 DMA_RAM_CLK_FO_R::new(((self.bits >> 6) & 1) != 0)
32 }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37 f.debug_struct("PD_CONF")
38 .field("dma_ram_force_pd", &self.dma_ram_force_pd())
39 .field("dma_ram_force_pu", &self.dma_ram_force_pu())
40 .field("dma_ram_clk_fo", &self.dma_ram_clk_fo())
41 .finish()
42 }
43}
44impl W {
45 #[doc = "Bit 4 - Set this bit to force power down DMA internal memory."]
46 #[inline(always)]
47 pub fn dma_ram_force_pd(&mut self) -> DMA_RAM_FORCE_PD_W<PD_CONF_SPEC> {
48 DMA_RAM_FORCE_PD_W::new(self, 4)
49 }
50 #[doc = "Bit 5 - Set this bit to force power up DMA internal memory"]
51 #[inline(always)]
52 pub fn dma_ram_force_pu(&mut self) -> DMA_RAM_FORCE_PU_W<PD_CONF_SPEC> {
53 DMA_RAM_FORCE_PU_W::new(self, 5)
54 }
55 #[doc = "Bit 6 - 1: Force to open the clock and bypass the gate-clock when accessing the RAM in DMA. 0: A gate-clock will be used when accessing the RAM in DMA."]
56 #[inline(always)]
57 pub fn dma_ram_clk_fo(&mut self) -> DMA_RAM_CLK_FO_W<PD_CONF_SPEC> {
58 DMA_RAM_CLK_FO_W::new(self, 6)
59 }
60}
61#[doc = "reserved\n\nYou can [`read`](crate::Reg::read) this register and get [`pd_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pd_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
62pub struct PD_CONF_SPEC;
63impl crate::RegisterSpec for PD_CONF_SPEC {
64 type Ux = u32;
65}
66#[doc = "`read()` method returns [`pd_conf::R`](R) reader structure"]
67impl crate::Readable for PD_CONF_SPEC {}
68#[doc = "`write(|w| ..)` method takes [`pd_conf::W`](W) writer structure"]
69impl crate::Writable for PD_CONF_SPEC {
70 type Safety = crate::Unsafe;
71 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
73}
74#[doc = "`reset()` method sets PD_CONF to value 0x20"]
75impl crate::Resettable for PD_CONF_SPEC {
76 const RESET_VALUE: u32 = 0x20;
77}