Module assist_debug

Source
Expand description

Debug Assist

Modules§

core_0_area_dram0_0_max
core0 dram0 region0 addr configuration register
core_0_area_dram0_0_min
core0 dram0 region0 addr configuration register
core_0_area_dram0_1_max
core0 dram0 region1 addr configuration register
core_0_area_dram0_1_min
core0 dram0 region1 addr configuration register
core_0_area_pc
core0 area pc status register
core_0_area_pif_0_max
core0 PIF region0 addr configuration register
core_0_area_pif_0_min
core0 PIF region0 addr configuration register
core_0_area_pif_1_max
core0 PIF region1 addr configuration register
core_0_area_pif_1_min
core0 PIF region1 addr configuration register
core_0_area_sp
core0 area sp status register
core_0_dram0_exception_monitor_0
core0 bus busy status regsiter
core_0_dram0_exception_monitor_1
core0 bus busy status regsiter
core_0_dram0_exception_monitor_2
core0 bus busy status regsiter
core_0_dram0_exception_monitor_3
core0 bus busy status regsiter
core_0_dram0_exception_monitor_4
core0 bus busy configuration regsiter
core_0_dram0_exception_monitor_5
core0 bus busy configuration regsiter
core_0_intr_clr
core0 monitor interrupt clr register
core_0_intr_ena
core0 monitor interrupt enable register
core_0_intr_raw
core0 monitor interrupt status register
core_0_iram0_exception_monitor_0
core0 bus busy status regsiter
core_0_iram0_exception_monitor_1
core0 bus busy status regsiter
core_0_montr_ena
core0 monitor enable configuration register
core_0_rcd_pdebugdata
core0 pdebug status register
core_0_rcd_pdebugenable
core0 pdebug configuration register
core_0_rcd_pdebuginst
core0 pdebug status register
core_0_rcd_pdebugls0addr
core0 pdebug status register
core_0_rcd_pdebugls0data
core0 pdebug status register
core_0_rcd_pdebugls0stat
core0 pdebug status register
core_0_rcd_pdebugpc
core0 pdebug status register
core_0_rcd_pdebugstatus
core0 pdebug status register
core_0_rcd_recording
core0 pdebug status register
core_0_rcd_sp
core0 pdebug status register
core_0_sp_max
core0 sp region configuration regsiter
core_0_sp_min
core0 sp region configuration regsiter
core_0_sp_pc
core0 sp pc status register
core_0_sp_unstable
core0 sp unstable configuration register
core_1_area_dram0_0_max
Core1 dram0 region0 addr configuration register
core_1_area_dram0_0_min
Core1 dram0 region0 addr configuration register
core_1_area_dram0_1_max
Core1 dram0 region1 addr configuration register
core_1_area_dram0_1_min
Core1 dram0 region1 addr configuration register
core_1_area_pc
Core1 area sp status register
core_1_area_pif_0_max
Core1 PIF region0 addr configuration register
core_1_area_pif_0_min
Core1 PIF region0 addr configuration register
core_1_area_pif_1_max
Core1 PIF region1 addr configuration register
core_1_area_pif_1_min
Core1 PIF region1 addr configuration register
core_1_area_sp
Core1 area pc status register
core_1_dram0_exception_monitor_0
Core1 bus busy status regsiter
core_1_dram0_exception_monitor_1
Core1 bus busy status regsiter
core_1_dram0_exception_monitor_2
Core1 bus busy status regsiter
core_1_dram0_exception_monitor_3
Core1 bus busy status regsiter
core_1_dram0_exception_monitor_4
Core1 bus busy status regsiter
core_1_dram0_exception_monitor_5
Core1 bus busy status regsiter
core_1_intr_clr
Core1 monitor interrupt clr register
core_1_intr_ena
Core1 monitor interrupt enable register
core_1_intr_raw
Core1 monitor interrupt status register
core_1_iram0_exception_monitor_0
Core1 bus busy status regsiter
core_1_iram0_exception_monitor_1
Core1 bus busy status regsiter
core_1_montr_ena
Core1 monitor enable configuration register
core_1_rcd_pdebugdata
Core1 pdebug status register
core_1_rcd_pdebugenable
Core1 pdebug configuration register
core_1_rcd_pdebuginst
Core1 pdebug status register
core_1_rcd_pdebugls0addr
Core1 pdebug status register
core_1_rcd_pdebugls0data
Core1 pdebug status register
core_1_rcd_pdebugls0stat
Core1 pdebug status register
core_1_rcd_pdebugpc
Core1 pdebug status register
core_1_rcd_pdebugstatus
Core1 pdebug status register
core_1_rcd_recording
Core1 pdebug status register
core_1_rcd_sp
Core1 pdebug status register
core_1_sp_max
Core1 sp region configuration regsiter
core_1_sp_min
Core1 sp region configuration regsiter
core_1_sp_pc
Core1 sp pc status register
core_1_sp_unstable
Core1 sp unstable configuration register
core_x_iram0_dram0_exception_monitor_0
bus busy configuration register
core_x_iram0_dram0_exception_monitor_1
bus busy configuration register
date
version register
log_data_0
log check data register
log_data_1
log check data register
log_data_2
log check data register
log_data_3
log check data register
log_data_mask
log check data mask register
log_max
log check region configuration register
log_mem_end
log mem region configuration register
log_mem_full_flag
log mem status register
log_mem_start
log mem region configuration register
log_mem_writing_addr
log mem addr status register
log_min
log check region configuration register
log_setting
log set register

Structs§

RegisterBlock
Register block

Type Aliases§

CORE_0_AREA_DRAM0_0_MAX
CORE_0_AREA_DRAM0_0_MAX (rw) register accessor: core0 dram0 region0 addr configuration register
CORE_0_AREA_DRAM0_0_MIN
CORE_0_AREA_DRAM0_0_MIN (rw) register accessor: core0 dram0 region0 addr configuration register
CORE_0_AREA_DRAM0_1_MAX
CORE_0_AREA_DRAM0_1_MAX (rw) register accessor: core0 dram0 region1 addr configuration register
CORE_0_AREA_DRAM0_1_MIN
CORE_0_AREA_DRAM0_1_MIN (rw) register accessor: core0 dram0 region1 addr configuration register
CORE_0_AREA_PC
CORE_0_AREA_PC (r) register accessor: core0 area pc status register
CORE_0_AREA_PIF_0_MAX
CORE_0_AREA_PIF_0_MAX (rw) register accessor: core0 PIF region0 addr configuration register
CORE_0_AREA_PIF_0_MIN
CORE_0_AREA_PIF_0_MIN (rw) register accessor: core0 PIF region0 addr configuration register
CORE_0_AREA_PIF_1_MAX
CORE_0_AREA_PIF_1_MAX (rw) register accessor: core0 PIF region1 addr configuration register
CORE_0_AREA_PIF_1_MIN
CORE_0_AREA_PIF_1_MIN (rw) register accessor: core0 PIF region1 addr configuration register
CORE_0_AREA_SP
CORE_0_AREA_SP (r) register accessor: core0 area sp status register
CORE_0_DRAM0_EXCEPTION_MONITOR_0
CORE_0_DRAM0_EXCEPTION_MONITOR_0 (r) register accessor: core0 bus busy status regsiter
CORE_0_DRAM0_EXCEPTION_MONITOR_1
CORE_0_DRAM0_EXCEPTION_MONITOR_1 (r) register accessor: core0 bus busy status regsiter
CORE_0_DRAM0_EXCEPTION_MONITOR_2
CORE_0_DRAM0_EXCEPTION_MONITOR_2 (r) register accessor: core0 bus busy status regsiter
CORE_0_DRAM0_EXCEPTION_MONITOR_3
CORE_0_DRAM0_EXCEPTION_MONITOR_3 (r) register accessor: core0 bus busy status regsiter
CORE_0_DRAM0_EXCEPTION_MONITOR_4
CORE_0_DRAM0_EXCEPTION_MONITOR_4 (r) register accessor: core0 bus busy configuration regsiter
CORE_0_DRAM0_EXCEPTION_MONITOR_5
CORE_0_DRAM0_EXCEPTION_MONITOR_5 (r) register accessor: core0 bus busy configuration regsiter
CORE_0_INTR_CLR
CORE_0_INTR_CLR (rw) register accessor: core0 monitor interrupt clr register
CORE_0_INTR_ENA
CORE_0_INTR_ENA (rw) register accessor: core0 monitor interrupt enable register
CORE_0_INTR_RAW
CORE_0_INTR_RAW (r) register accessor: core0 monitor interrupt status register
CORE_0_IRAM0_EXCEPTION_MONITOR_0
CORE_0_IRAM0_EXCEPTION_MONITOR_0 (r) register accessor: core0 bus busy status regsiter
CORE_0_IRAM0_EXCEPTION_MONITOR_1
CORE_0_IRAM0_EXCEPTION_MONITOR_1 (r) register accessor: core0 bus busy status regsiter
CORE_0_MONTR_ENA
CORE_0_MONTR_ENA (rw) register accessor: core0 monitor enable configuration register
CORE_0_RCD_PDEBUGDATA
CORE_0_RCD_PDEBUGDATA (r) register accessor: core0 pdebug status register
CORE_0_RCD_PDEBUGENABLE
CORE_0_RCD_PDEBUGENABLE (rw) register accessor: core0 pdebug configuration register
CORE_0_RCD_PDEBUGINST
CORE_0_RCD_PDEBUGINST (r) register accessor: core0 pdebug status register
CORE_0_RCD_PDEBUGLS0ADDR
CORE_0_RCD_PDEBUGLS0ADDR (r) register accessor: core0 pdebug status register
CORE_0_RCD_PDEBUGLS0DATA
CORE_0_RCD_PDEBUGLS0DATA (r) register accessor: core0 pdebug status register
CORE_0_RCD_PDEBUGLS0STAT
CORE_0_RCD_PDEBUGLS0STAT (r) register accessor: core0 pdebug status register
CORE_0_RCD_PDEBUGPC
CORE_0_RCD_PDEBUGPC (r) register accessor: core0 pdebug status register
CORE_0_RCD_PDEBUGSTATUS
CORE_0_RCD_PDEBUGSTATUS (r) register accessor: core0 pdebug status register
CORE_0_RCD_RECORDING
CORE_0_RCD_RECORDING (rw) register accessor: core0 pdebug status register
CORE_0_RCD_SP
CORE_0_RCD_SP (r) register accessor: core0 pdebug status register
CORE_0_SP_MAX
CORE_0_SP_MAX (rw) register accessor: core0 sp region configuration regsiter
CORE_0_SP_MIN
CORE_0_SP_MIN (rw) register accessor: core0 sp region configuration regsiter
CORE_0_SP_PC
CORE_0_SP_PC (r) register accessor: core0 sp pc status register
CORE_0_SP_UNSTABLE
CORE_0_SP_UNSTABLE (rw) register accessor: core0 sp unstable configuration register
CORE_1_AREA_DRAM0_0_MAX
CORE_1_AREA_DRAM0_0_MAX (rw) register accessor: Core1 dram0 region0 addr configuration register
CORE_1_AREA_DRAM0_0_MIN
CORE_1_AREA_DRAM0_0_MIN (rw) register accessor: Core1 dram0 region0 addr configuration register
CORE_1_AREA_DRAM0_1_MAX
CORE_1_AREA_DRAM0_1_MAX (rw) register accessor: Core1 dram0 region1 addr configuration register
CORE_1_AREA_DRAM0_1_MIN
CORE_1_AREA_DRAM0_1_MIN (rw) register accessor: Core1 dram0 region1 addr configuration register
CORE_1_AREA_PC
CORE_1_AREA_PC (r) register accessor: Core1 area sp status register
CORE_1_AREA_PIF_0_MAX
CORE_1_AREA_PIF_0_MAX (rw) register accessor: Core1 PIF region0 addr configuration register
CORE_1_AREA_PIF_0_MIN
CORE_1_AREA_PIF_0_MIN (rw) register accessor: Core1 PIF region0 addr configuration register
CORE_1_AREA_PIF_1_MAX
CORE_1_AREA_PIF_1_MAX (rw) register accessor: Core1 PIF region1 addr configuration register
CORE_1_AREA_PIF_1_MIN
CORE_1_AREA_PIF_1_MIN (rw) register accessor: Core1 PIF region1 addr configuration register
CORE_1_AREA_SP
CORE_1_AREA_SP (r) register accessor: Core1 area pc status register
CORE_1_DRAM0_EXCEPTION_MONITOR_0
CORE_1_DRAM0_EXCEPTION_MONITOR_0 (r) register accessor: Core1 bus busy status regsiter
CORE_1_DRAM0_EXCEPTION_MONITOR_1
CORE_1_DRAM0_EXCEPTION_MONITOR_1 (r) register accessor: Core1 bus busy status regsiter
CORE_1_DRAM0_EXCEPTION_MONITOR_2
CORE_1_DRAM0_EXCEPTION_MONITOR_2 (r) register accessor: Core1 bus busy status regsiter
CORE_1_DRAM0_EXCEPTION_MONITOR_3
CORE_1_DRAM0_EXCEPTION_MONITOR_3 (r) register accessor: Core1 bus busy status regsiter
CORE_1_DRAM0_EXCEPTION_MONITOR_4
CORE_1_DRAM0_EXCEPTION_MONITOR_4 (r) register accessor: Core1 bus busy status regsiter
CORE_1_DRAM0_EXCEPTION_MONITOR_5
CORE_1_DRAM0_EXCEPTION_MONITOR_5 (r) register accessor: Core1 bus busy status regsiter
CORE_1_INTR_CLR
CORE_1_INTR_CLR (rw) register accessor: Core1 monitor interrupt clr register
CORE_1_INTR_ENA
CORE_1_INTR_ENA (rw) register accessor: Core1 monitor interrupt enable register
CORE_1_INTR_RAW
CORE_1_INTR_RAW (r) register accessor: Core1 monitor interrupt status register
CORE_1_IRAM0_EXCEPTION_MONITOR_0
CORE_1_IRAM0_EXCEPTION_MONITOR_0 (r) register accessor: Core1 bus busy status regsiter
CORE_1_IRAM0_EXCEPTION_MONITOR_1
CORE_1_IRAM0_EXCEPTION_MONITOR_1 (r) register accessor: Core1 bus busy status regsiter
CORE_1_MONTR_ENA
CORE_1_MONTR_ENA (rw) register accessor: Core1 monitor enable configuration register
CORE_1_RCD_PDEBUGDATA
CORE_1_RCD_PDEBUGDATA (r) register accessor: Core1 pdebug status register
CORE_1_RCD_PDEBUGENABLE
CORE_1_RCD_PDEBUGENABLE (rw) register accessor: Core1 pdebug configuration register
CORE_1_RCD_PDEBUGINST
CORE_1_RCD_PDEBUGINST (r) register accessor: Core1 pdebug status register
CORE_1_RCD_PDEBUGLS0ADDR
CORE_1_RCD_PDEBUGLS0ADDR (r) register accessor: Core1 pdebug status register
CORE_1_RCD_PDEBUGLS0DATA
CORE_1_RCD_PDEBUGLS0DATA (r) register accessor: Core1 pdebug status register
CORE_1_RCD_PDEBUGLS0STAT
CORE_1_RCD_PDEBUGLS0STAT (r) register accessor: Core1 pdebug status register
CORE_1_RCD_PDEBUGPC
CORE_1_RCD_PDEBUGPC (r) register accessor: Core1 pdebug status register
CORE_1_RCD_PDEBUGSTATUS
CORE_1_RCD_PDEBUGSTATUS (r) register accessor: Core1 pdebug status register
CORE_1_RCD_RECORDING
CORE_1_RCD_RECORDING (rw) register accessor: Core1 pdebug status register
CORE_1_RCD_SP
CORE_1_RCD_SP (r) register accessor: Core1 pdebug status register
CORE_1_SP_MAX
CORE_1_SP_MAX (rw) register accessor: Core1 sp region configuration regsiter
CORE_1_SP_MIN
CORE_1_SP_MIN (rw) register accessor: Core1 sp region configuration regsiter
CORE_1_SP_PC
CORE_1_SP_PC (r) register accessor: Core1 sp pc status register
CORE_1_SP_UNSTABLE
CORE_1_SP_UNSTABLE (rw) register accessor: Core1 sp unstable configuration register
CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0
CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0 (rw) register accessor: bus busy configuration register
CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1
CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1 (rw) register accessor: bus busy configuration register
DATE
DATE (rw) register accessor: version register
LOG_DATA_0
LOG_DATA_0 (rw) register accessor: log check data register
LOG_DATA_1
LOG_DATA_1 (rw) register accessor: log check data register
LOG_DATA_2
LOG_DATA_2 (rw) register accessor: log check data register
LOG_DATA_3
LOG_DATA_3 (rw) register accessor: log check data register
LOG_DATA_MASK
LOG_DATA_MASK (rw) register accessor: log check data mask register
LOG_MAX
LOG_MAX (rw) register accessor: log check region configuration register
LOG_MEM_END
LOG_MEM_END (rw) register accessor: log mem region configuration register
LOG_MEM_FULL_FLAG
LOG_MEM_FULL_FLAG (rw) register accessor: log mem status register
LOG_MEM_START
LOG_MEM_START (rw) register accessor: log mem region configuration register
LOG_MEM_WRITING_ADDR
LOG_MEM_WRITING_ADDR (r) register accessor: log mem addr status register
LOG_MIN
LOG_MIN (rw) register accessor: log check region configuration register
LOG_SETTING
LOG_SETTING (rw) register accessor: log set register