Expand description
Debug Assist
Modules§
- core_
0_ area_ dram0_ 0_ max - core0 dram0 region0 addr configuration register
- core_
0_ area_ dram0_ 0_ min - core0 dram0 region0 addr configuration register
- core_
0_ area_ dram0_ 1_ max - core0 dram0 region1 addr configuration register
- core_
0_ area_ dram0_ 1_ min - core0 dram0 region1 addr configuration register
- core_
0_ area_ pc - core0 area pc status register
- core_
0_ area_ pif_ 0_ max - core0 PIF region0 addr configuration register
- core_
0_ area_ pif_ 0_ min - core0 PIF region0 addr configuration register
- core_
0_ area_ pif_ 1_ max - core0 PIF region1 addr configuration register
- core_
0_ area_ pif_ 1_ min - core0 PIF region1 addr configuration register
- core_
0_ area_ sp - core0 area sp status register
- core_
0_ dram0_ exception_ monitor_ 0 - core0 bus busy status regsiter
- core_
0_ dram0_ exception_ monitor_ 1 - core0 bus busy status regsiter
- core_
0_ dram0_ exception_ monitor_ 2 - core0 bus busy status regsiter
- core_
0_ dram0_ exception_ monitor_ 3 - core0 bus busy status regsiter
- core_
0_ dram0_ exception_ monitor_ 4 - core0 bus busy configuration regsiter
- core_
0_ dram0_ exception_ monitor_ 5 - core0 bus busy configuration regsiter
- core_
0_ intr_ clr - core0 monitor interrupt clr register
- core_
0_ intr_ ena - core0 monitor interrupt enable register
- core_
0_ intr_ raw - core0 monitor interrupt status register
- core_
0_ iram0_ exception_ monitor_ 0 - core0 bus busy status regsiter
- core_
0_ iram0_ exception_ monitor_ 1 - core0 bus busy status regsiter
- core_
0_ montr_ ena - core0 monitor enable configuration register
- core_
0_ rcd_ pdebugdata - core0 pdebug status register
- core_
0_ rcd_ pdebugenable - core0 pdebug configuration register
- core_
0_ rcd_ pdebuginst - core0 pdebug status register
- core_
0_ rcd_ pdebugls0addr - core0 pdebug status register
- core_
0_ rcd_ pdebugls0data - core0 pdebug status register
- core_
0_ rcd_ pdebugls0stat - core0 pdebug status register
- core_
0_ rcd_ pdebugpc - core0 pdebug status register
- core_
0_ rcd_ pdebugstatus - core0 pdebug status register
- core_
0_ rcd_ recording - core0 pdebug status register
- core_
0_ rcd_ sp - core0 pdebug status register
- core_
0_ sp_ max - core0 sp region configuration regsiter
- core_
0_ sp_ min - core0 sp region configuration regsiter
- core_
0_ sp_ pc - core0 sp pc status register
- core_
0_ sp_ unstable - core0 sp unstable configuration register
- core_
1_ area_ dram0_ 0_ max - Core1 dram0 region0 addr configuration register
- core_
1_ area_ dram0_ 0_ min - Core1 dram0 region0 addr configuration register
- core_
1_ area_ dram0_ 1_ max - Core1 dram0 region1 addr configuration register
- core_
1_ area_ dram0_ 1_ min - Core1 dram0 region1 addr configuration register
- core_
1_ area_ pc - Core1 area sp status register
- core_
1_ area_ pif_ 0_ max - Core1 PIF region0 addr configuration register
- core_
1_ area_ pif_ 0_ min - Core1 PIF region0 addr configuration register
- core_
1_ area_ pif_ 1_ max - Core1 PIF region1 addr configuration register
- core_
1_ area_ pif_ 1_ min - Core1 PIF region1 addr configuration register
- core_
1_ area_ sp - Core1 area pc status register
- core_
1_ dram0_ exception_ monitor_ 0 - Core1 bus busy status regsiter
- core_
1_ dram0_ exception_ monitor_ 1 - Core1 bus busy status regsiter
- core_
1_ dram0_ exception_ monitor_ 2 - Core1 bus busy status regsiter
- core_
1_ dram0_ exception_ monitor_ 3 - Core1 bus busy status regsiter
- core_
1_ dram0_ exception_ monitor_ 4 - Core1 bus busy status regsiter
- core_
1_ dram0_ exception_ monitor_ 5 - Core1 bus busy status regsiter
- core_
1_ intr_ clr - Core1 monitor interrupt clr register
- core_
1_ intr_ ena - Core1 monitor interrupt enable register
- core_
1_ intr_ raw - Core1 monitor interrupt status register
- core_
1_ iram0_ exception_ monitor_ 0 - Core1 bus busy status regsiter
- core_
1_ iram0_ exception_ monitor_ 1 - Core1 bus busy status regsiter
- core_
1_ montr_ ena - Core1 monitor enable configuration register
- core_
1_ rcd_ pdebugdata - Core1 pdebug status register
- core_
1_ rcd_ pdebugenable - Core1 pdebug configuration register
- core_
1_ rcd_ pdebuginst - Core1 pdebug status register
- core_
1_ rcd_ pdebugls0addr - Core1 pdebug status register
- core_
1_ rcd_ pdebugls0data - Core1 pdebug status register
- core_
1_ rcd_ pdebugls0stat - Core1 pdebug status register
- core_
1_ rcd_ pdebugpc - Core1 pdebug status register
- core_
1_ rcd_ pdebugstatus - Core1 pdebug status register
- core_
1_ rcd_ recording - Core1 pdebug status register
- core_
1_ rcd_ sp - Core1 pdebug status register
- core_
1_ sp_ max - Core1 sp region configuration regsiter
- core_
1_ sp_ min - Core1 sp region configuration regsiter
- core_
1_ sp_ pc - Core1 sp pc status register
- core_
1_ sp_ unstable - Core1 sp unstable configuration register
- core_
x_ iram0_ dram0_ exception_ monitor_ 0 - bus busy configuration register
- core_
x_ iram0_ dram0_ exception_ monitor_ 1 - bus busy configuration register
- date
- version register
- log_
data_ 0 - log check data register
- log_
data_ 1 - log check data register
- log_
data_ 2 - log check data register
- log_
data_ 3 - log check data register
- log_
data_ mask - log check data mask register
- log_max
- log check region configuration register
- log_
mem_ end - log mem region configuration register
- log_
mem_ full_ flag - log mem status register
- log_
mem_ start - log mem region configuration register
- log_
mem_ writing_ addr - log mem addr status register
- log_min
- log check region configuration register
- log_
setting - log set register
Structs§
- Register
Block - Register block
Type Aliases§
- CORE_
0_ AREA_ DRAM0_ 0_ MAX - CORE_0_AREA_DRAM0_0_MAX (rw) register accessor: core0 dram0 region0 addr configuration register
- CORE_
0_ AREA_ DRAM0_ 0_ MIN - CORE_0_AREA_DRAM0_0_MIN (rw) register accessor: core0 dram0 region0 addr configuration register
- CORE_
0_ AREA_ DRAM0_ 1_ MAX - CORE_0_AREA_DRAM0_1_MAX (rw) register accessor: core0 dram0 region1 addr configuration register
- CORE_
0_ AREA_ DRAM0_ 1_ MIN - CORE_0_AREA_DRAM0_1_MIN (rw) register accessor: core0 dram0 region1 addr configuration register
- CORE_
0_ AREA_ PC - CORE_0_AREA_PC (r) register accessor: core0 area pc status register
- CORE_
0_ AREA_ PIF_ 0_ MAX - CORE_0_AREA_PIF_0_MAX (rw) register accessor: core0 PIF region0 addr configuration register
- CORE_
0_ AREA_ PIF_ 0_ MIN - CORE_0_AREA_PIF_0_MIN (rw) register accessor: core0 PIF region0 addr configuration register
- CORE_
0_ AREA_ PIF_ 1_ MAX - CORE_0_AREA_PIF_1_MAX (rw) register accessor: core0 PIF region1 addr configuration register
- CORE_
0_ AREA_ PIF_ 1_ MIN - CORE_0_AREA_PIF_1_MIN (rw) register accessor: core0 PIF region1 addr configuration register
- CORE_
0_ AREA_ SP - CORE_0_AREA_SP (r) register accessor: core0 area sp status register
- CORE_
0_ DRAM0_ EXCEPTION_ MONITOR_ 0 - CORE_0_DRAM0_EXCEPTION_MONITOR_0 (r) register accessor: core0 bus busy status regsiter
- CORE_
0_ DRAM0_ EXCEPTION_ MONITOR_ 1 - CORE_0_DRAM0_EXCEPTION_MONITOR_1 (r) register accessor: core0 bus busy status regsiter
- CORE_
0_ DRAM0_ EXCEPTION_ MONITOR_ 2 - CORE_0_DRAM0_EXCEPTION_MONITOR_2 (r) register accessor: core0 bus busy status regsiter
- CORE_
0_ DRAM0_ EXCEPTION_ MONITOR_ 3 - CORE_0_DRAM0_EXCEPTION_MONITOR_3 (r) register accessor: core0 bus busy status regsiter
- CORE_
0_ DRAM0_ EXCEPTION_ MONITOR_ 4 - CORE_0_DRAM0_EXCEPTION_MONITOR_4 (r) register accessor: core0 bus busy configuration regsiter
- CORE_
0_ DRAM0_ EXCEPTION_ MONITOR_ 5 - CORE_0_DRAM0_EXCEPTION_MONITOR_5 (r) register accessor: core0 bus busy configuration regsiter
- CORE_
0_ INTR_ CLR - CORE_0_INTR_CLR (rw) register accessor: core0 monitor interrupt clr register
- CORE_
0_ INTR_ ENA - CORE_0_INTR_ENA (rw) register accessor: core0 monitor interrupt enable register
- CORE_
0_ INTR_ RAW - CORE_0_INTR_RAW (r) register accessor: core0 monitor interrupt status register
- CORE_
0_ IRAM0_ EXCEPTION_ MONITOR_ 0 - CORE_0_IRAM0_EXCEPTION_MONITOR_0 (r) register accessor: core0 bus busy status regsiter
- CORE_
0_ IRAM0_ EXCEPTION_ MONITOR_ 1 - CORE_0_IRAM0_EXCEPTION_MONITOR_1 (r) register accessor: core0 bus busy status regsiter
- CORE_
0_ MONTR_ ENA - CORE_0_MONTR_ENA (rw) register accessor: core0 monitor enable configuration register
- CORE_
0_ RCD_ PDEBUGDATA - CORE_0_RCD_PDEBUGDATA (r) register accessor: core0 pdebug status register
- CORE_
0_ RCD_ PDEBUGENABLE - CORE_0_RCD_PDEBUGENABLE (rw) register accessor: core0 pdebug configuration register
- CORE_
0_ RCD_ PDEBUGINST - CORE_0_RCD_PDEBUGINST (r) register accessor: core0 pdebug status register
- CORE_
0_ RCD_ PDEBUGL S0ADDR - CORE_0_RCD_PDEBUGLS0ADDR (r) register accessor: core0 pdebug status register
- CORE_
0_ RCD_ PDEBUGL S0DATA - CORE_0_RCD_PDEBUGLS0DATA (r) register accessor: core0 pdebug status register
- CORE_
0_ RCD_ PDEBUGL S0STAT - CORE_0_RCD_PDEBUGLS0STAT (r) register accessor: core0 pdebug status register
- CORE_
0_ RCD_ PDEBUGPC - CORE_0_RCD_PDEBUGPC (r) register accessor: core0 pdebug status register
- CORE_
0_ RCD_ PDEBUGSTATUS - CORE_0_RCD_PDEBUGSTATUS (r) register accessor: core0 pdebug status register
- CORE_
0_ RCD_ RECORDING - CORE_0_RCD_RECORDING (rw) register accessor: core0 pdebug status register
- CORE_
0_ RCD_ SP - CORE_0_RCD_SP (r) register accessor: core0 pdebug status register
- CORE_
0_ SP_ MAX - CORE_0_SP_MAX (rw) register accessor: core0 sp region configuration regsiter
- CORE_
0_ SP_ MIN - CORE_0_SP_MIN (rw) register accessor: core0 sp region configuration regsiter
- CORE_
0_ SP_ PC - CORE_0_SP_PC (r) register accessor: core0 sp pc status register
- CORE_
0_ SP_ UNSTABLE - CORE_0_SP_UNSTABLE (rw) register accessor: core0 sp unstable configuration register
- CORE_
1_ AREA_ DRAM0_ 0_ MAX - CORE_1_AREA_DRAM0_0_MAX (rw) register accessor: Core1 dram0 region0 addr configuration register
- CORE_
1_ AREA_ DRAM0_ 0_ MIN - CORE_1_AREA_DRAM0_0_MIN (rw) register accessor: Core1 dram0 region0 addr configuration register
- CORE_
1_ AREA_ DRAM0_ 1_ MAX - CORE_1_AREA_DRAM0_1_MAX (rw) register accessor: Core1 dram0 region1 addr configuration register
- CORE_
1_ AREA_ DRAM0_ 1_ MIN - CORE_1_AREA_DRAM0_1_MIN (rw) register accessor: Core1 dram0 region1 addr configuration register
- CORE_
1_ AREA_ PC - CORE_1_AREA_PC (r) register accessor: Core1 area sp status register
- CORE_
1_ AREA_ PIF_ 0_ MAX - CORE_1_AREA_PIF_0_MAX (rw) register accessor: Core1 PIF region0 addr configuration register
- CORE_
1_ AREA_ PIF_ 0_ MIN - CORE_1_AREA_PIF_0_MIN (rw) register accessor: Core1 PIF region0 addr configuration register
- CORE_
1_ AREA_ PIF_ 1_ MAX - CORE_1_AREA_PIF_1_MAX (rw) register accessor: Core1 PIF region1 addr configuration register
- CORE_
1_ AREA_ PIF_ 1_ MIN - CORE_1_AREA_PIF_1_MIN (rw) register accessor: Core1 PIF region1 addr configuration register
- CORE_
1_ AREA_ SP - CORE_1_AREA_SP (r) register accessor: Core1 area pc status register
- CORE_
1_ DRAM0_ EXCEPTION_ MONITOR_ 0 - CORE_1_DRAM0_EXCEPTION_MONITOR_0 (r) register accessor: Core1 bus busy status regsiter
- CORE_
1_ DRAM0_ EXCEPTION_ MONITOR_ 1 - CORE_1_DRAM0_EXCEPTION_MONITOR_1 (r) register accessor: Core1 bus busy status regsiter
- CORE_
1_ DRAM0_ EXCEPTION_ MONITOR_ 2 - CORE_1_DRAM0_EXCEPTION_MONITOR_2 (r) register accessor: Core1 bus busy status regsiter
- CORE_
1_ DRAM0_ EXCEPTION_ MONITOR_ 3 - CORE_1_DRAM0_EXCEPTION_MONITOR_3 (r) register accessor: Core1 bus busy status regsiter
- CORE_
1_ DRAM0_ EXCEPTION_ MONITOR_ 4 - CORE_1_DRAM0_EXCEPTION_MONITOR_4 (r) register accessor: Core1 bus busy status regsiter
- CORE_
1_ DRAM0_ EXCEPTION_ MONITOR_ 5 - CORE_1_DRAM0_EXCEPTION_MONITOR_5 (r) register accessor: Core1 bus busy status regsiter
- CORE_
1_ INTR_ CLR - CORE_1_INTR_CLR (rw) register accessor: Core1 monitor interrupt clr register
- CORE_
1_ INTR_ ENA - CORE_1_INTR_ENA (rw) register accessor: Core1 monitor interrupt enable register
- CORE_
1_ INTR_ RAW - CORE_1_INTR_RAW (r) register accessor: Core1 monitor interrupt status register
- CORE_
1_ IRAM0_ EXCEPTION_ MONITOR_ 0 - CORE_1_IRAM0_EXCEPTION_MONITOR_0 (r) register accessor: Core1 bus busy status regsiter
- CORE_
1_ IRAM0_ EXCEPTION_ MONITOR_ 1 - CORE_1_IRAM0_EXCEPTION_MONITOR_1 (r) register accessor: Core1 bus busy status regsiter
- CORE_
1_ MONTR_ ENA - CORE_1_MONTR_ENA (rw) register accessor: Core1 monitor enable configuration register
- CORE_
1_ RCD_ PDEBUGDATA - CORE_1_RCD_PDEBUGDATA (r) register accessor: Core1 pdebug status register
- CORE_
1_ RCD_ PDEBUGENABLE - CORE_1_RCD_PDEBUGENABLE (rw) register accessor: Core1 pdebug configuration register
- CORE_
1_ RCD_ PDEBUGINST - CORE_1_RCD_PDEBUGINST (r) register accessor: Core1 pdebug status register
- CORE_
1_ RCD_ PDEBUGL S0ADDR - CORE_1_RCD_PDEBUGLS0ADDR (r) register accessor: Core1 pdebug status register
- CORE_
1_ RCD_ PDEBUGL S0DATA - CORE_1_RCD_PDEBUGLS0DATA (r) register accessor: Core1 pdebug status register
- CORE_
1_ RCD_ PDEBUGL S0STAT - CORE_1_RCD_PDEBUGLS0STAT (r) register accessor: Core1 pdebug status register
- CORE_
1_ RCD_ PDEBUGPC - CORE_1_RCD_PDEBUGPC (r) register accessor: Core1 pdebug status register
- CORE_
1_ RCD_ PDEBUGSTATUS - CORE_1_RCD_PDEBUGSTATUS (r) register accessor: Core1 pdebug status register
- CORE_
1_ RCD_ RECORDING - CORE_1_RCD_RECORDING (rw) register accessor: Core1 pdebug status register
- CORE_
1_ RCD_ SP - CORE_1_RCD_SP (r) register accessor: Core1 pdebug status register
- CORE_
1_ SP_ MAX - CORE_1_SP_MAX (rw) register accessor: Core1 sp region configuration regsiter
- CORE_
1_ SP_ MIN - CORE_1_SP_MIN (rw) register accessor: Core1 sp region configuration regsiter
- CORE_
1_ SP_ PC - CORE_1_SP_PC (r) register accessor: Core1 sp pc status register
- CORE_
1_ SP_ UNSTABLE - CORE_1_SP_UNSTABLE (rw) register accessor: Core1 sp unstable configuration register
- CORE_
X_ IRAM0_ DRAM0_ EXCEPTION_ MONITOR_ 0 - CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0 (rw) register accessor: bus busy configuration register
- CORE_
X_ IRAM0_ DRAM0_ EXCEPTION_ MONITOR_ 1 - CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1 (rw) register accessor: bus busy configuration register
- DATE
- DATE (rw) register accessor: version register
- LOG_
DATA_ 0 - LOG_DATA_0 (rw) register accessor: log check data register
- LOG_
DATA_ 1 - LOG_DATA_1 (rw) register accessor: log check data register
- LOG_
DATA_ 2 - LOG_DATA_2 (rw) register accessor: log check data register
- LOG_
DATA_ 3 - LOG_DATA_3 (rw) register accessor: log check data register
- LOG_
DATA_ MASK - LOG_DATA_MASK (rw) register accessor: log check data mask register
- LOG_MAX
- LOG_MAX (rw) register accessor: log check region configuration register
- LOG_
MEM_ END - LOG_MEM_END (rw) register accessor: log mem region configuration register
- LOG_
MEM_ FULL_ FLAG - LOG_MEM_FULL_FLAG (rw) register accessor: log mem status register
- LOG_
MEM_ START - LOG_MEM_START (rw) register accessor: log mem region configuration register
- LOG_
MEM_ WRITING_ ADDR - LOG_MEM_WRITING_ADDR (r) register accessor: log mem addr status register
- LOG_MIN
- LOG_MIN (rw) register accessor: log check region configuration register
- LOG_
SETTING - LOG_SETTING (rw) register accessor: log set register