Module esp32s3::spi0::ctrl

SPI0 control register.

Structs

CTRL_SPEC

SPI0 control register.

R

Register CTRL reader

W

Register CTRL writer

Type Definitions

D_POL_R

Field D_POL reader - The bit is used to set MOSI line polarity, 1: high 0, low

D_POL_W

Field D_POL writer - The bit is used to set MOSI line polarity, 1: high 0, low

FADDR_OCT_R

Field FADDR_OCT reader - Set this bit to enable 8-bit-mode(8-bm) in ADDR phase.

FADDR_OCT_W

Field FADDR_OCT writer - Set this bit to enable 8-bit-mode(8-bm) in ADDR phase.

FASTRD_MODE_R

Field FASTRD_MODE reader - This bit should be set when SPI_MEM_FREAD_QIO, SPI_MEM_FREAD_DIO, SPI_MEM_FREAD_QUAD or SPI_MEM_FREAD_DUAL is set.

FASTRD_MODE_W

Field FASTRD_MODE writer - This bit should be set when SPI_MEM_FREAD_QIO, SPI_MEM_FREAD_DIO, SPI_MEM_FREAD_QUAD or SPI_MEM_FREAD_DUAL is set.

FCMD_DUAL_R

Field FCMD_DUAL reader - Set this bit to enable 2-bit-mode(2-bm) in CMD phase.

FCMD_DUAL_W

Field FCMD_DUAL writer - Set this bit to enable 2-bit-mode(2-bm) in CMD phase.

FCMD_OCT_R

Field FCMD_OCT reader - Set this bit to enable 8-bit-mode(8-bm) in CMD phase.

FCMD_OCT_W

Field FCMD_OCT writer - Set this bit to enable 8-bit-mode(8-bm) in CMD phase.

FCMD_QUAD_R

Field FCMD_QUAD reader - Set this bit to enable 4-bit-mode(4-bm) in CMD phase.

FCMD_QUAD_W

Field FCMD_QUAD writer - Set this bit to enable 4-bit-mode(4-bm) in CMD phase.

FDIN_OCT_R

Field FDIN_OCT reader - Set this bit to enable 8-bit-mode(8-bm) in DIN phase.

FDIN_OCT_W

Field FDIN_OCT writer - Set this bit to enable 8-bit-mode(8-bm) in DIN phase.

FDOUT_OCT_R

Field FDOUT_OCT reader - Set this bit to enable 8-bit-mode(8-bm) in DOUT phase.

FDOUT_OCT_W

Field FDOUT_OCT writer - Set this bit to enable 8-bit-mode(8-bm) in DOUT phase.

FDUMMY_OUT_R

Field FDUMMY_OUT reader - In the DUMMY phase the signal level of SPI bus is output by the SPI0 controller.

FDUMMY_OUT_W

Field FDUMMY_OUT writer - In the DUMMY phase the signal level of SPI bus is output by the SPI0 controller.

FREAD_DIO_R

Field FREAD_DIO reader - In hardware 0xBB read operation, ADDR phase and DIN phase apply 2 signals(2-bit-mode). 1: enable 0: disable.

FREAD_DIO_W

Field FREAD_DIO writer - In hardware 0xBB read operation, ADDR phase and DIN phase apply 2 signals(2-bit-mode). 1: enable 0: disable.

FREAD_DUAL_R

Field FREAD_DUAL reader - In hardware 0x3B read operation, DIN phase apply 2 signals. 1: enable 0: disable.

FREAD_DUAL_W

Field FREAD_DUAL writer - In hardware 0x3B read operation, DIN phase apply 2 signals. 1: enable 0: disable.

FREAD_QIO_R

Field FREAD_QIO reader - In hardware 0xEB read operation, ADDR phase and DIN phase apply 4 signals(4-bit-mode). 1: enable 0: disable.

FREAD_QIO_W

Field FREAD_QIO writer - In hardware 0xEB read operation, ADDR phase and DIN phase apply 4 signals(4-bit-mode). 1: enable 0: disable.

FREAD_QUAD_R

Field FREAD_QUAD reader - In hardware 0x6B read operation, DIN phase apply 4 signals(4-bit-mode). 1: enable 0: disable.

FREAD_QUAD_W

Field FREAD_QUAD writer - In hardware 0x6B read operation, DIN phase apply 4 signals(4-bit-mode). 1: enable 0: disable.

Q_POL_R

Field Q_POL reader - The bit is used to set MISO line polarity, 1: high 0, low

Q_POL_W

Field Q_POL writer - The bit is used to set MISO line polarity, 1: high 0, low

WP_R

Field WP reader - Write protect signal output when SPI is idle. 1: output high, 0: output low.

WP_W

Field WP writer - Write protect signal output when SPI is idle. 1: output high, 0: output low.