Module esp32s3::spi0

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SPI (Serial Peripheral Interface) Controller 0

Modules§

  • cache_fctrl
    SPI0 external RAM bit mode control register.
  • cache_sctrl
    SPI0 external RAM control register
  • clock
    SPI_CLK clock division register when SPI0 accesses to flash.
  • clock_gate
    SPI0 clk_gate register
  • core_clk_sel
    SPI0 module clock select register
  • ctrl
    SPI0 control register.
  • ctrl1
    SPI0 control 1 register.
  • ctrl2
    SPI0 control 2 register.
  • date
    SPI0 version control register
  • ddr
    SPI0 flash DDR mode control register
  • din_mode
    MSPI input timing delay mode control register when accesses to flash.
  • din_num
    MSPI input timing delay number control register when accesses to flash.
  • dout_mode
    MSPI output timing delay mode control register when accesses to flash.
  • ecc_ctrl
    MSPI ECC control register
  • ecc_err_addr
    MSPI ECC error address register
  • ecc_err_bit
    MSPI ECC error bits register
  • ext_addr
    SPI0 extended address register.
  • fsm
    SPI0 state machine(FSM) status register.
  • int_clr
    SPI1 interrupt clear register
  • int_ena
    SPI1 interrupt enable register
  • int_raw
    SPI1 interrupt raw register
  • int_st
    SPI1 interrupt status register
  • misc
    SPI0 misc register
  • rd_status
    SPI0 read control register.
  • spi_smem_ac
    MSPI external RAM ECC and SPI CS timing control register
  • spi_smem_ddr
    SPI0 external RAM DDR mode control register
  • spi_smem_din_mode
    MSPI input timing delay mode control register when accesses to Ext_RAM.
  • spi_smem_din_num
    MSPI input timing delay number control register when accesses to Ext_RAM.
  • spi_smem_dout_mode
    MSPI output timing delay mode control register when accesses to Ext_RAM.
  • spi_smem_timing_cali
    SPI0 Ext_RAM timing compensation register.
  • sram_clk
    SPI_CLK clock division register when SPI0 accesses to Ext_RAM.
  • sram_cmd
    SPI0 external RAM mode control register
  • sram_drd_cmd
    SPI0 external RAM DDR read command control register
  • sram_dwr_cmd
    SPI0 external RAM DDR write command control register
  • timing_cali
    SPI0 timing compensation register when accesses to flash.
  • user
    SPI0 user register.
  • user1
    SPI0 user1 register.
  • user2
    SPI0 user2 register.

Structs§

Type Aliases§

  • CACHE_FCTRL
    CACHE_FCTRL (rw) register accessor: SPI0 external RAM bit mode control register.
  • CACHE_SCTRL
    CACHE_SCTRL (rw) register accessor: SPI0 external RAM control register
  • CLOCK
    CLOCK (rw) register accessor: SPI_CLK clock division register when SPI0 accesses to flash.
  • CLOCK_GATE
    CLOCK_GATE (rw) register accessor: SPI0 clk_gate register
  • CORE_CLK_SEL
    CORE_CLK_SEL (rw) register accessor: SPI0 module clock select register
  • CTRL
    CTRL (rw) register accessor: SPI0 control register.
  • CTRL1
    CTRL1 (rw) register accessor: SPI0 control 1 register.
  • CTRL2
    CTRL2 (rw) register accessor: SPI0 control 2 register.
  • DATE
    DATE (rw) register accessor: SPI0 version control register
  • DDR
    DDR (rw) register accessor: SPI0 flash DDR mode control register
  • DIN_MODE
    DIN_MODE (rw) register accessor: MSPI input timing delay mode control register when accesses to flash.
  • DIN_NUM
    DIN_NUM (rw) register accessor: MSPI input timing delay number control register when accesses to flash.
  • DOUT_MODE
    DOUT_MODE (rw) register accessor: MSPI output timing delay mode control register when accesses to flash.
  • ECC_CTRL
    ECC_CTRL (rw) register accessor: MSPI ECC control register
  • ECC_ERR_ADDR
    ECC_ERR_ADDR (r) register accessor: MSPI ECC error address register
  • ECC_ERR_BIT
    ECC_ERR_BIT (r) register accessor: MSPI ECC error bits register
  • EXT_ADDR
    EXT_ADDR (rw) register accessor: SPI0 extended address register.
  • FSM
    FSM (r) register accessor: SPI0 state machine(FSM) status register.
  • INT_CLR
    INT_CLR (w) register accessor: SPI1 interrupt clear register
  • INT_ENA
    INT_ENA (rw) register accessor: SPI1 interrupt enable register
  • INT_RAW
    INT_RAW (rw) register accessor: SPI1 interrupt raw register
  • INT_ST
    INT_ST (r) register accessor: SPI1 interrupt status register
  • MISC
    MISC (rw) register accessor: SPI0 misc register
  • RD_STATUS
    RD_STATUS (rw) register accessor: SPI0 read control register.
  • SPI_SMEM_AC
    SPI_SMEM_AC (rw) register accessor: MSPI external RAM ECC and SPI CS timing control register
  • SPI_SMEM_DDR
    SPI_SMEM_DDR (rw) register accessor: SPI0 external RAM DDR mode control register
  • SPI_SMEM_DIN_MODE
    SPI_SMEM_DIN_MODE (rw) register accessor: MSPI input timing delay mode control register when accesses to Ext_RAM.
  • SPI_SMEM_DIN_NUM
    SPI_SMEM_DIN_NUM (rw) register accessor: MSPI input timing delay number control register when accesses to Ext_RAM.
  • SPI_SMEM_DOUT_MODE
    SPI_SMEM_DOUT_MODE (rw) register accessor: MSPI output timing delay mode control register when accesses to Ext_RAM.
  • SPI_SMEM_TIMING_CALI
    SPI_SMEM_TIMING_CALI (rw) register accessor: SPI0 Ext_RAM timing compensation register.
  • SRAM_CLK
    SRAM_CLK (rw) register accessor: SPI_CLK clock division register when SPI0 accesses to Ext_RAM.
  • SRAM_CMD
    SRAM_CMD (rw) register accessor: SPI0 external RAM mode control register
  • SRAM_DRD_CMD
    SRAM_DRD_CMD (rw) register accessor: SPI0 external RAM DDR read command control register
  • SRAM_DWR_CMD
    SRAM_DWR_CMD (rw) register accessor: SPI0 external RAM DDR write command control register
  • TIMING_CALI
    TIMING_CALI (rw) register accessor: SPI0 timing compensation register when accesses to flash.
  • USER
    USER (rw) register accessor: SPI0 user register.
  • USER1
    USER1 (rw) register accessor: SPI0 user1 register.
  • USER2
    USER2 (rw) register accessor: SPI0 user2 register.