Module esp32s3::spi1::clock

source ·
Expand description

SPI_CLK clock division register when SPI1 accesses to flash or Ext_RAM.

Structs§

  • SPI_CLK clock division register when SPI1 accesses to flash or Ext_RAM.

Type Aliases§

  • Field CLKCNT_H reader - It must be a floor value of ((SPI_MEM_CLKCNT_N+1)/2-1).
  • Field CLKCNT_H writer - It must be a floor value of ((SPI_MEM_CLKCNT_N+1)/2-1).
  • Field CLKCNT_L reader - It must equal to the value of SPI_MEM_CLKCNT_N.
  • Field CLKCNT_L writer - It must equal to the value of SPI_MEM_CLKCNT_N.
  • Field CLKCNT_N reader - When SPI1 accesses to flash or Ext_RAM, f_SPI_CLK = f_MSPI_CORE_CLK/(SPI_MEM_CLKCNT_N+1)
  • Field CLKCNT_N writer - When SPI1 accesses to flash or Ext_RAM, f_SPI_CLK = f_MSPI_CORE_CLK/(SPI_MEM_CLKCNT_N+1)
  • Field CLK_EQU_SYSCLK reader - When SPI1 access to flash or Ext_RAM, set this bit in 1-division mode, f_SPI_CLK = f_MSPI_CORE_CLK.
  • Field CLK_EQU_SYSCLK writer - When SPI1 access to flash or Ext_RAM, set this bit in 1-division mode, f_SPI_CLK = f_MSPI_CORE_CLK.
  • Register CLOCK reader
  • Register CLOCK writer