1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100

#[doc = "Register `CORE_0_REGION_PMS_CONSTRAIN_13` reader"]
pub struct R(crate::R<CORE_0_REGION_PMS_CONSTRAIN_13_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<CORE_0_REGION_PMS_CONSTRAIN_13_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl From<crate::R<CORE_0_REGION_PMS_CONSTRAIN_13_SPEC>> for R {
    #[inline(always)]
    fn from(reader: crate::R<CORE_0_REGION_PMS_CONSTRAIN_13_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `CORE_0_REGION_PMS_CONSTRAIN_13` writer"]
pub struct W(crate::W<CORE_0_REGION_PMS_CONSTRAIN_13_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<CORE_0_REGION_PMS_CONSTRAIN_13_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl From<crate::W<CORE_0_REGION_PMS_CONSTRAIN_13_SPEC>> for W {
    #[inline(always)]
    fn from(writer: crate::W<CORE_0_REGION_PMS_CONSTRAIN_13_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `CORE_0_REGION_PMS_CONSTRAIN_ADDR_10` reader - Region 9 end address and Region 10 start address for core0."]
pub type CORE_0_REGION_PMS_CONSTRAIN_ADDR_10_R = crate::FieldReader<u32>;
#[doc = "Field `CORE_0_REGION_PMS_CONSTRAIN_ADDR_10` writer - Region 9 end address and Region 10 start address for core0."]
pub type CORE_0_REGION_PMS_CONSTRAIN_ADDR_10_W<'a, const O: u8> =
    crate::FieldWriter<'a, CORE_0_REGION_PMS_CONSTRAIN_13_SPEC, 30, O, u32>;
impl R {
    #[doc = "Bits 0:29 - Region 9 end address and Region 10 start address for core0."]
    #[inline(always)]
    pub fn core_0_region_pms_constrain_addr_10(&self) -> CORE_0_REGION_PMS_CONSTRAIN_ADDR_10_R {
        CORE_0_REGION_PMS_CONSTRAIN_ADDR_10_R::new(self.bits & 0x3fff_ffff)
    }
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("CORE_0_REGION_PMS_CONSTRAIN_13")
            .field(
                "core_0_region_pms_constrain_addr_10",
                &format_args!("{}", self.core_0_region_pms_constrain_addr_10().bits()),
            )
            .finish()
    }
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for crate::generic::Reg<CORE_0_REGION_PMS_CONSTRAIN_13_SPEC> {
    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
        self.read().fmt(f)
    }
}
impl W {
    #[doc = "Bits 0:29 - Region 9 end address and Region 10 start address for core0."]
    #[inline(always)]
    #[must_use]
    pub fn core_0_region_pms_constrain_addr_10(
        &mut self,
    ) -> CORE_0_REGION_PMS_CONSTRAIN_ADDR_10_W<0> {
        CORE_0_REGION_PMS_CONSTRAIN_ADDR_10_W::new(self)
    }
    #[doc = "Writes raw bits to the register."]
    #[inline(always)]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "Core0 region permission register 13.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [core_0_region_pms_constrain_13](index.html) module"]
pub struct CORE_0_REGION_PMS_CONSTRAIN_13_SPEC;
impl crate::RegisterSpec for CORE_0_REGION_PMS_CONSTRAIN_13_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [core_0_region_pms_constrain_13::R](R) reader structure"]
impl crate::Readable for CORE_0_REGION_PMS_CONSTRAIN_13_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [core_0_region_pms_constrain_13::W](W) writer structure"]
impl crate::Writable for CORE_0_REGION_PMS_CONSTRAIN_13_SPEC {
    type Writer = W;
    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
#[doc = "`reset()` method sets CORE_0_REGION_PMS_CONSTRAIN_13 to value 0"]
impl crate::Resettable for CORE_0_REGION_PMS_CONSTRAIN_13_SPEC {
    const RESET_VALUE: Self::Ux = 0;
}