Expand description
SHA (Secure Hash Algorithm) Accelerator
Modules
- Busy register.
- Interrupt clear register.
- Typical SHA configuration register 1.
- Date register.
- DMA configuration register 0.
- DMA configuration register 2.
- DMA configuration register 1.
- Sha H memory which contains intermediate hash or finial hash.
- Interrupt enable register.
- Sha M memory which contains message.
- Initial configuration register.
- Typical SHA configuration register 0.
- SHA 512/t configuration register 1.
- SHA 512/t configuration register 0.
Structs
- Register block
Type Definitions
- BUSY (r) register accessor: an alias for
Reg<BUSY_SPEC>
- CLEAR_IRQ (w) register accessor: an alias for
Reg<CLEAR_IRQ_SPEC>
- CONTINUE (r) register accessor: an alias for
Reg<CONTINUE_SPEC>
- DATE (rw) register accessor: an alias for
Reg<DATE_SPEC>
- DMA_BLOCK_NUM (rw) register accessor: an alias for
Reg<DMA_BLOCK_NUM_SPEC>
- DMA_CONTINUE (w) register accessor: an alias for
Reg<DMA_CONTINUE_SPEC>
- DMA_START (w) register accessor: an alias for
Reg<DMA_START_SPEC>
- H_MEM (rw) register accessor: an alias for
Reg<H_MEM_SPEC>
- IRQ_ENA (rw) register accessor: an alias for
Reg<IRQ_ENA_SPEC>
- MODE (rw) register accessor: an alias for
Reg<MODE_SPEC>
- M_MEM (rw) register accessor: an alias for
Reg<M_MEM_SPEC>
- START (r) register accessor: an alias for
Reg<START_SPEC>
- T_LENGTH (rw) register accessor: an alias for
Reg<T_LENGTH_SPEC>
- T_STRING (rw) register accessor: an alias for
Reg<T_STRING_SPEC>