Module esp32s3::ledc::int_st

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Masked interrupt status

Structs

Type Definitions

  • DUTY_CHNG_END_CH0_INT_ST_R
    Field DUTY_CHNG_END_CH0_INT_ST reader - This is the masked interrupt status bit for the LEDC_DUTY_CHNG_END_CH0_INT interrupt when LEDC_DUTY_CHNG_END_CH0_INT_ENAIS set to 1.
  • DUTY_CHNG_END_CH1_INT_ST_R
    Field DUTY_CHNG_END_CH1_INT_ST reader - This is the masked interrupt status bit for the LEDC_DUTY_CHNG_END_CH1_INT interrupt when LEDC_DUTY_CHNG_END_CH1_INT_ENAIS set to 1.
  • DUTY_CHNG_END_CH2_INT_ST_R
    Field DUTY_CHNG_END_CH2_INT_ST reader - This is the masked interrupt status bit for the LEDC_DUTY_CHNG_END_CH2_INT interrupt when LEDC_DUTY_CHNG_END_CH2_INT_ENAIS set to 1.
  • DUTY_CHNG_END_CH3_INT_ST_R
    Field DUTY_CHNG_END_CH3_INT_ST reader - This is the masked interrupt status bit for the LEDC_DUTY_CHNG_END_CH3_INT interrupt when LEDC_DUTY_CHNG_END_CH3_INT_ENAIS set to 1.
  • DUTY_CHNG_END_CH4_INT_ST_R
    Field DUTY_CHNG_END_CH4_INT_ST reader - This is the masked interrupt status bit for the LEDC_DUTY_CHNG_END_CH4_INT interrupt when LEDC_DUTY_CHNG_END_CH4_INT_ENAIS set to 1.
  • DUTY_CHNG_END_CH5_INT_ST_R
    Field DUTY_CHNG_END_CH5_INT_ST reader - This is the masked interrupt status bit for the LEDC_DUTY_CHNG_END_CH5_INT interrupt when LEDC_DUTY_CHNG_END_CH5_INT_ENAIS set to 1.
  • DUTY_CHNG_END_CH6_INT_ST_R
    Field DUTY_CHNG_END_CH6_INT_ST reader - This is the masked interrupt status bit for the LEDC_DUTY_CHNG_END_CH6_INT interrupt when LEDC_DUTY_CHNG_END_CH6_INT_ENAIS set to 1.
  • DUTY_CHNG_END_CH7_INT_ST_R
    Field DUTY_CHNG_END_CH7_INT_ST reader - This is the masked interrupt status bit for the LEDC_DUTY_CHNG_END_CH7_INT interrupt when LEDC_DUTY_CHNG_END_CH7_INT_ENAIS set to 1.
  • OVF_CNT_CH0_INT_ST_R
    Field OVF_CNT_CH0_INT_ST reader - This is the masked interrupt status bit for the LEDC_OVF_CNT_CH0_INT interrupt when LEDC_OVF_CNT_CH0_INT_ENA is set to 1.
  • OVF_CNT_CH1_INT_ST_R
    Field OVF_CNT_CH1_INT_ST reader - This is the masked interrupt status bit for the LEDC_OVF_CNT_CH1_INT interrupt when LEDC_OVF_CNT_CH1_INT_ENA is set to 1.
  • OVF_CNT_CH2_INT_ST_R
    Field OVF_CNT_CH2_INT_ST reader - This is the masked interrupt status bit for the LEDC_OVF_CNT_CH2_INT interrupt when LEDC_OVF_CNT_CH2_INT_ENA is set to 1.
  • OVF_CNT_CH3_INT_ST_R
    Field OVF_CNT_CH3_INT_ST reader - This is the masked interrupt status bit for the LEDC_OVF_CNT_CH3_INT interrupt when LEDC_OVF_CNT_CH3_INT_ENA is set to 1.
  • OVF_CNT_CH4_INT_ST_R
    Field OVF_CNT_CH4_INT_ST reader - This is the masked interrupt status bit for the LEDC_OVF_CNT_CH4_INT interrupt when LEDC_OVF_CNT_CH4_INT_ENA is set to 1.
  • OVF_CNT_CH5_INT_ST_R
    Field OVF_CNT_CH5_INT_ST reader - This is the masked interrupt status bit for the LEDC_OVF_CNT_CH5_INT interrupt when LEDC_OVF_CNT_CH5_INT_ENA is set to 1.
  • OVF_CNT_CH6_INT_ST_R
    Field OVF_CNT_CH6_INT_ST reader - This is the masked interrupt status bit for the LEDC_OVF_CNT_CH6_INT interrupt when LEDC_OVF_CNT_CH6_INT_ENA is set to 1.
  • OVF_CNT_CH7_INT_ST_R
    Field OVF_CNT_CH7_INT_ST reader - This is the masked interrupt status bit for the LEDC_OVF_CNT_CH7_INT interrupt when LEDC_OVF_CNT_CH7_INT_ENA is set to 1.
  • TIMER0_OVF_INT_ST_R
    Field TIMER0_OVF_INT_ST reader - This is the masked interrupt status bit for the LEDC_TIMER0_OVF_INT interrupt when LEDC_TIMER0_OVF_INT_ENA is set to 1.
  • TIMER1_OVF_INT_ST_R
    Field TIMER1_OVF_INT_ST reader - This is the masked interrupt status bit for the LEDC_TIMER1_OVF_INT interrupt when LEDC_TIMER1_OVF_INT_ENA is set to 1.
  • TIMER2_OVF_INT_ST_R
    Field TIMER2_OVF_INT_ST reader - This is the masked interrupt status bit for the LEDC_TIMER2_OVF_INT interrupt when LEDC_TIMER2_OVF_INT_ENA is set to 1.
  • TIMER3_OVF_INT_ST_R
    Field TIMER3_OVF_INT_ST reader - This is the masked interrupt status bit for the LEDC_TIMER3_OVF_INT interrupt when LEDC_TIMER3_OVF_INT_ENA is set to 1.