Expand description
SPI0 external RAM mode control register
Structs
Register
SRAM_CMD
readerSPI0 external RAM mode control register
Register
SRAM_CMD
writerType Definitions
Field
SADDR_DUAL
reader - When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in ADDR phase.Field
SADDR_DUAL
writer - When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in ADDR phase.Field
SADDR_OCT
reader - When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in ADDR phase.Field
SADDR_OCT
writer - When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in ADDR phase.Field
SADDR_QUAD
reader - When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in ADDR phase.Field
SADDR_QUAD
writer - When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in ADDR phase.Field
SCLK_MODE
reader - SPI_CLK mode bits when SPI0 accesses to Ext_RAM. 0: SPI_CLK is off when CS inactive 1: SPI_CLK is delayed one cycle after CS inactive 2: SPI_CLK is delayed two cycles after CS inactive 3: SPI_CLK is always on.Field
SCLK_MODE
writer - SPI_CLK mode bits when SPI0 accesses to Ext_RAM. 0: SPI_CLK is off when CS inactive 1: SPI_CLK is delayed one cycle after CS inactive 2: SPI_CLK is delayed two cycles after CS inactive 3: SPI_CLK is always on.Field
SCMD_DUAL
reader - When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in CMD phase.Field
SCMD_DUAL
writer - When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in CMD phase.Field
SCMD_OCT
reader - When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in CMD phase.Field
SCMD_OCT
writer - When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in CMD phase.Field
SCMD_QUAD
reader - When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in CMD phase.Field
SCMD_QUAD
writer - When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in CMD phase.Field
SDIN_DUAL
reader - When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in DIN phase.Field
SDIN_DUAL
writer - When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in DIN phase.Field
SDIN_OCT
reader - When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in DIN phase.Field
SDIN_OCT
writer - When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in DIN phase.Field
SDIN_QUAD
reader - When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in DIN phase.Field
SDIN_QUAD
writer - When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in DIN phase.Field
SDOUT_DUAL
reader - When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in DOUT phase.Field
SDOUT_DUAL
writer - When SPI0 accesses to Ext_RAM, set this bit to enable 2-bm in DOUT phase.Field
SDOUT_OCT
reader - When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in DOUT phase.Field
SDOUT_OCT
writer - When SPI0 accesses to Ext_RAM, set this bit to enable 8-bm in DOUT phase.Field
SDOUT_QUAD
reader - When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in DOUT phase.Field
SDOUT_QUAD
writer - When SPI0 accesses to Ext_RAM, set this bit to enable 4-bm in DOUT phase.Field
SDUMMY_OUT
reader - When SPI0 accesses to Ext_RAM, in the DUMMY phase the signal level of SPI bus is output by the SPI0 controller.Field
SDUMMY_OUT
writer - When SPI0 accesses to Ext_RAM, in the DUMMY phase the signal level of SPI bus is output by the SPI0 controller.Field
SWB_MODE
reader - Mode bits when SPI0 accesses to Ext_RAM.Field
SWB_MODE
writer - Mode bits when SPI0 accesses to Ext_RAM.