esp32s3_ulp/sens/
sar_slave_addr3.rs

1#[doc = "Register `SAR_SLAVE_ADDR3` reader"]
2pub type R = crate::R<SAR_SLAVE_ADDR3_SPEC>;
3#[doc = "Register `SAR_SLAVE_ADDR3` writer"]
4pub type W = crate::W<SAR_SLAVE_ADDR3_SPEC>;
5#[doc = "Field `SAR_I2C_SLAVE_ADDR5` reader - configure i2c slave address5"]
6pub type SAR_I2C_SLAVE_ADDR5_R = crate::FieldReader<u16>;
7#[doc = "Field `SAR_I2C_SLAVE_ADDR5` writer - configure i2c slave address5"]
8pub type SAR_I2C_SLAVE_ADDR5_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>;
9#[doc = "Field `SAR_I2C_SLAVE_ADDR4` reader - configure i2c slave address4"]
10pub type SAR_I2C_SLAVE_ADDR4_R = crate::FieldReader<u16>;
11#[doc = "Field `SAR_I2C_SLAVE_ADDR4` writer - configure i2c slave address4"]
12pub type SAR_I2C_SLAVE_ADDR4_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>;
13impl R {
14    #[doc = "Bits 0:10 - configure i2c slave address5"]
15    #[inline(always)]
16    pub fn sar_i2c_slave_addr5(&self) -> SAR_I2C_SLAVE_ADDR5_R {
17        SAR_I2C_SLAVE_ADDR5_R::new((self.bits & 0x07ff) as u16)
18    }
19    #[doc = "Bits 11:21 - configure i2c slave address4"]
20    #[inline(always)]
21    pub fn sar_i2c_slave_addr4(&self) -> SAR_I2C_SLAVE_ADDR4_R {
22        SAR_I2C_SLAVE_ADDR4_R::new(((self.bits >> 11) & 0x07ff) as u16)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("SAR_SLAVE_ADDR3")
29            .field("sar_i2c_slave_addr5", &self.sar_i2c_slave_addr5())
30            .field("sar_i2c_slave_addr4", &self.sar_i2c_slave_addr4())
31            .finish()
32    }
33}
34impl W {
35    #[doc = "Bits 0:10 - configure i2c slave address5"]
36    #[inline(always)]
37    #[must_use]
38    pub fn sar_i2c_slave_addr5(&mut self) -> SAR_I2C_SLAVE_ADDR5_W<SAR_SLAVE_ADDR3_SPEC> {
39        SAR_I2C_SLAVE_ADDR5_W::new(self, 0)
40    }
41    #[doc = "Bits 11:21 - configure i2c slave address4"]
42    #[inline(always)]
43    #[must_use]
44    pub fn sar_i2c_slave_addr4(&mut self) -> SAR_I2C_SLAVE_ADDR4_W<SAR_SLAVE_ADDR3_SPEC> {
45        SAR_I2C_SLAVE_ADDR4_W::new(self, 11)
46    }
47}
48#[doc = "configure i2c slave address\n\nYou can [`read`](crate::Reg::read) this register and get [`sar_slave_addr3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sar_slave_addr3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
49pub struct SAR_SLAVE_ADDR3_SPEC;
50impl crate::RegisterSpec for SAR_SLAVE_ADDR3_SPEC {
51    type Ux = u32;
52}
53#[doc = "`read()` method returns [`sar_slave_addr3::R`](R) reader structure"]
54impl crate::Readable for SAR_SLAVE_ADDR3_SPEC {}
55#[doc = "`write(|w| ..)` method takes [`sar_slave_addr3::W`](W) writer structure"]
56impl crate::Writable for SAR_SLAVE_ADDR3_SPEC {
57    type Safety = crate::Unsafe;
58    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
59    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
60}
61#[doc = "`reset()` method sets SAR_SLAVE_ADDR3 to value 0"]
62impl crate::Resettable for SAR_SLAVE_ADDR3_SPEC {
63    const RESET_VALUE: u32 = 0;
64}