esp32s3_ulp/sens/
sar_cocpu_int_st.rs

1#[doc = "Register `SAR_COCPU_INT_ST` reader"]
2pub type R = crate::R<SAR_COCPU_INT_ST_SPEC>;
3#[doc = "Field `SAR_COCPU_TOUCH_DONE_INT_ST` reader - int state of touch done"]
4pub type SAR_COCPU_TOUCH_DONE_INT_ST_R = crate::BitReader;
5#[doc = "Field `SAR_COCPU_TOUCH_INACTIVE_INT_ST` reader - int state of from touch inactive"]
6pub type SAR_COCPU_TOUCH_INACTIVE_INT_ST_R = crate::BitReader;
7#[doc = "Field `SAR_COCPU_TOUCH_ACTIVE_INT_ST` reader - int state of touch active"]
8pub type SAR_COCPU_TOUCH_ACTIVE_INT_ST_R = crate::BitReader;
9#[doc = "Field `SAR_COCPU_SARADC1_INT_ST` reader - int state of from saradc1"]
10pub type SAR_COCPU_SARADC1_INT_ST_R = crate::BitReader;
11#[doc = "Field `SAR_COCPU_SARADC2_INT_ST` reader - int state of from saradc2"]
12pub type SAR_COCPU_SARADC2_INT_ST_R = crate::BitReader;
13#[doc = "Field `SAR_COCPU_TSENS_INT_ST` reader - int state of tsens"]
14pub type SAR_COCPU_TSENS_INT_ST_R = crate::BitReader;
15#[doc = "Field `SAR_COCPU_START_INT_ST` reader - int state of start"]
16pub type SAR_COCPU_START_INT_ST_R = crate::BitReader;
17#[doc = "Field `SAR_COCPU_SW_INT_ST` reader - int state of software"]
18pub type SAR_COCPU_SW_INT_ST_R = crate::BitReader;
19#[doc = "Field `SAR_COCPU_SWD_INT_ST` reader - int state of super watch dog"]
20pub type SAR_COCPU_SWD_INT_ST_R = crate::BitReader;
21#[doc = "Field `SAR_COCPU_TOUCH_TIMEOUT_INT_ST` reader - int state of timeout done"]
22pub type SAR_COCPU_TOUCH_TIMEOUT_INT_ST_R = crate::BitReader;
23#[doc = "Field `SAR_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ST` reader - int state of approach loop done"]
24pub type SAR_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ST_R = crate::BitReader;
25#[doc = "Field `SAR_COCPU_TOUCH_SCAN_DONE_INT_ST` reader - int state of touch scan done"]
26pub type SAR_COCPU_TOUCH_SCAN_DONE_INT_ST_R = crate::BitReader;
27impl R {
28    #[doc = "Bit 0 - int state of touch done"]
29    #[inline(always)]
30    pub fn sar_cocpu_touch_done_int_st(&self) -> SAR_COCPU_TOUCH_DONE_INT_ST_R {
31        SAR_COCPU_TOUCH_DONE_INT_ST_R::new((self.bits & 1) != 0)
32    }
33    #[doc = "Bit 1 - int state of from touch inactive"]
34    #[inline(always)]
35    pub fn sar_cocpu_touch_inactive_int_st(&self) -> SAR_COCPU_TOUCH_INACTIVE_INT_ST_R {
36        SAR_COCPU_TOUCH_INACTIVE_INT_ST_R::new(((self.bits >> 1) & 1) != 0)
37    }
38    #[doc = "Bit 2 - int state of touch active"]
39    #[inline(always)]
40    pub fn sar_cocpu_touch_active_int_st(&self) -> SAR_COCPU_TOUCH_ACTIVE_INT_ST_R {
41        SAR_COCPU_TOUCH_ACTIVE_INT_ST_R::new(((self.bits >> 2) & 1) != 0)
42    }
43    #[doc = "Bit 3 - int state of from saradc1"]
44    #[inline(always)]
45    pub fn sar_cocpu_saradc1_int_st(&self) -> SAR_COCPU_SARADC1_INT_ST_R {
46        SAR_COCPU_SARADC1_INT_ST_R::new(((self.bits >> 3) & 1) != 0)
47    }
48    #[doc = "Bit 4 - int state of from saradc2"]
49    #[inline(always)]
50    pub fn sar_cocpu_saradc2_int_st(&self) -> SAR_COCPU_SARADC2_INT_ST_R {
51        SAR_COCPU_SARADC2_INT_ST_R::new(((self.bits >> 4) & 1) != 0)
52    }
53    #[doc = "Bit 5 - int state of tsens"]
54    #[inline(always)]
55    pub fn sar_cocpu_tsens_int_st(&self) -> SAR_COCPU_TSENS_INT_ST_R {
56        SAR_COCPU_TSENS_INT_ST_R::new(((self.bits >> 5) & 1) != 0)
57    }
58    #[doc = "Bit 6 - int state of start"]
59    #[inline(always)]
60    pub fn sar_cocpu_start_int_st(&self) -> SAR_COCPU_START_INT_ST_R {
61        SAR_COCPU_START_INT_ST_R::new(((self.bits >> 6) & 1) != 0)
62    }
63    #[doc = "Bit 7 - int state of software"]
64    #[inline(always)]
65    pub fn sar_cocpu_sw_int_st(&self) -> SAR_COCPU_SW_INT_ST_R {
66        SAR_COCPU_SW_INT_ST_R::new(((self.bits >> 7) & 1) != 0)
67    }
68    #[doc = "Bit 8 - int state of super watch dog"]
69    #[inline(always)]
70    pub fn sar_cocpu_swd_int_st(&self) -> SAR_COCPU_SWD_INT_ST_R {
71        SAR_COCPU_SWD_INT_ST_R::new(((self.bits >> 8) & 1) != 0)
72    }
73    #[doc = "Bit 9 - int state of timeout done"]
74    #[inline(always)]
75    pub fn sar_cocpu_touch_timeout_int_st(&self) -> SAR_COCPU_TOUCH_TIMEOUT_INT_ST_R {
76        SAR_COCPU_TOUCH_TIMEOUT_INT_ST_R::new(((self.bits >> 9) & 1) != 0)
77    }
78    #[doc = "Bit 10 - int state of approach loop done"]
79    #[inline(always)]
80    pub fn sar_cocpu_touch_approach_loop_done_int_st(
81        &self,
82    ) -> SAR_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ST_R {
83        SAR_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_ST_R::new(((self.bits >> 10) & 1) != 0)
84    }
85    #[doc = "Bit 11 - int state of touch scan done"]
86    #[inline(always)]
87    pub fn sar_cocpu_touch_scan_done_int_st(&self) -> SAR_COCPU_TOUCH_SCAN_DONE_INT_ST_R {
88        SAR_COCPU_TOUCH_SCAN_DONE_INT_ST_R::new(((self.bits >> 11) & 1) != 0)
89    }
90}
91#[cfg(feature = "impl-register-debug")]
92impl core::fmt::Debug for R {
93    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
94        f.debug_struct("SAR_COCPU_INT_ST")
95            .field(
96                "sar_cocpu_touch_done_int_st",
97                &self.sar_cocpu_touch_done_int_st(),
98            )
99            .field(
100                "sar_cocpu_touch_inactive_int_st",
101                &self.sar_cocpu_touch_inactive_int_st(),
102            )
103            .field(
104                "sar_cocpu_touch_active_int_st",
105                &self.sar_cocpu_touch_active_int_st(),
106            )
107            .field("sar_cocpu_saradc1_int_st", &self.sar_cocpu_saradc1_int_st())
108            .field("sar_cocpu_saradc2_int_st", &self.sar_cocpu_saradc2_int_st())
109            .field("sar_cocpu_tsens_int_st", &self.sar_cocpu_tsens_int_st())
110            .field("sar_cocpu_start_int_st", &self.sar_cocpu_start_int_st())
111            .field("sar_cocpu_sw_int_st", &self.sar_cocpu_sw_int_st())
112            .field("sar_cocpu_swd_int_st", &self.sar_cocpu_swd_int_st())
113            .field(
114                "sar_cocpu_touch_timeout_int_st",
115                &self.sar_cocpu_touch_timeout_int_st(),
116            )
117            .field(
118                "sar_cocpu_touch_approach_loop_done_int_st",
119                &self.sar_cocpu_touch_approach_loop_done_int_st(),
120            )
121            .field(
122                "sar_cocpu_touch_scan_done_int_st",
123                &self.sar_cocpu_touch_scan_done_int_st(),
124            )
125            .finish()
126    }
127}
128#[doc = "the interrupt state of ulp\n\nYou can [`read`](crate::Reg::read) this register and get [`sar_cocpu_int_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
129pub struct SAR_COCPU_INT_ST_SPEC;
130impl crate::RegisterSpec for SAR_COCPU_INT_ST_SPEC {
131    type Ux = u32;
132}
133#[doc = "`read()` method returns [`sar_cocpu_int_st::R`](R) reader structure"]
134impl crate::Readable for SAR_COCPU_INT_ST_SPEC {}
135#[doc = "`reset()` method sets SAR_COCPU_INT_ST to value 0"]
136impl crate::Resettable for SAR_COCPU_INT_ST_SPEC {
137    const RESET_VALUE: u32 = 0;
138}
esp32s3_ulp/sens/sar_cocpu_int_st.rs

esp32s3_ulp/sens/
sar_cocpu_int_st.rs
