esp32s3_ulp/sens/
sar_cocpu_int_clr.rs

1#[doc = "Register `SAR_COCPU_INT_CLR` writer"]
2pub type W = crate::W<SAR_COCPU_INT_CLR_SPEC>;
3#[doc = "Field `SAR_COCPU_TOUCH_DONE_INT_CLR` writer - int clear of touch done"]
4pub type SAR_COCPU_TOUCH_DONE_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `SAR_COCPU_TOUCH_INACTIVE_INT_CLR` writer - int clear of from touch inactive"]
6pub type SAR_COCPU_TOUCH_INACTIVE_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `SAR_COCPU_TOUCH_ACTIVE_INT_CLR` writer - int clear of touch active"]
8pub type SAR_COCPU_TOUCH_ACTIVE_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SAR_COCPU_SARADC1_INT_CLR` writer - int clear of from saradc1"]
10pub type SAR_COCPU_SARADC1_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `SAR_COCPU_SARADC2_INT_CLR` writer - int clear of from saradc2"]
12pub type SAR_COCPU_SARADC2_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `SAR_COCPU_TSENS_INT_CLR` writer - int clear of tsens"]
14pub type SAR_COCPU_TSENS_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `SAR_COCPU_START_INT_CLR` writer - int clear of start"]
16pub type SAR_COCPU_START_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `SAR_COCPU_SW_INT_CLR` writer - int clear of software"]
18pub type SAR_COCPU_SW_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
19#[doc = "Field `SAR_COCPU_SWD_INT_CLR` writer - int clear of super watch dog"]
20pub type SAR_COCPU_SWD_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `SAR_COCPU_TOUCH_TIMEOUT_INT_CLR` writer - int clear of timeout done"]
22pub type SAR_COCPU_TOUCH_TIMEOUT_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `SAR_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_CLR` writer - int clear of approach loop done"]
24pub type SAR_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `SAR_COCPU_TOUCH_SCAN_DONE_INT_CLR` writer - int clear of touch scan done"]
26pub type SAR_COCPU_TOUCH_SCAN_DONE_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
27#[cfg(feature = "impl-register-debug")]
28impl core::fmt::Debug for crate::generic::Reg<SAR_COCPU_INT_CLR_SPEC> {
29    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
30        write!(f, "(not readable)")
31    }
32}
33impl W {
34    #[doc = "Bit 0 - int clear of touch done"]
35    #[inline(always)]
36    #[must_use]
37    pub fn sar_cocpu_touch_done_int_clr(
38        &mut self,
39    ) -> SAR_COCPU_TOUCH_DONE_INT_CLR_W<SAR_COCPU_INT_CLR_SPEC> {
40        SAR_COCPU_TOUCH_DONE_INT_CLR_W::new(self, 0)
41    }
42    #[doc = "Bit 1 - int clear of from touch inactive"]
43    #[inline(always)]
44    #[must_use]
45    pub fn sar_cocpu_touch_inactive_int_clr(
46        &mut self,
47    ) -> SAR_COCPU_TOUCH_INACTIVE_INT_CLR_W<SAR_COCPU_INT_CLR_SPEC> {
48        SAR_COCPU_TOUCH_INACTIVE_INT_CLR_W::new(self, 1)
49    }
50    #[doc = "Bit 2 - int clear of touch active"]
51    #[inline(always)]
52    #[must_use]
53    pub fn sar_cocpu_touch_active_int_clr(
54        &mut self,
55    ) -> SAR_COCPU_TOUCH_ACTIVE_INT_CLR_W<SAR_COCPU_INT_CLR_SPEC> {
56        SAR_COCPU_TOUCH_ACTIVE_INT_CLR_W::new(self, 2)
57    }
58    #[doc = "Bit 3 - int clear of from saradc1"]
59    #[inline(always)]
60    #[must_use]
61    pub fn sar_cocpu_saradc1_int_clr(
62        &mut self,
63    ) -> SAR_COCPU_SARADC1_INT_CLR_W<SAR_COCPU_INT_CLR_SPEC> {
64        SAR_COCPU_SARADC1_INT_CLR_W::new(self, 3)
65    }
66    #[doc = "Bit 4 - int clear of from saradc2"]
67    #[inline(always)]
68    #[must_use]
69    pub fn sar_cocpu_saradc2_int_clr(
70        &mut self,
71    ) -> SAR_COCPU_SARADC2_INT_CLR_W<SAR_COCPU_INT_CLR_SPEC> {
72        SAR_COCPU_SARADC2_INT_CLR_W::new(self, 4)
73    }
74    #[doc = "Bit 5 - int clear of tsens"]
75    #[inline(always)]
76    #[must_use]
77    pub fn sar_cocpu_tsens_int_clr(&mut self) -> SAR_COCPU_TSENS_INT_CLR_W<SAR_COCPU_INT_CLR_SPEC> {
78        SAR_COCPU_TSENS_INT_CLR_W::new(self, 5)
79    }
80    #[doc = "Bit 6 - int clear of start"]
81    #[inline(always)]
82    #[must_use]
83    pub fn sar_cocpu_start_int_clr(&mut self) -> SAR_COCPU_START_INT_CLR_W<SAR_COCPU_INT_CLR_SPEC> {
84        SAR_COCPU_START_INT_CLR_W::new(self, 6)
85    }
86    #[doc = "Bit 7 - int clear of software"]
87    #[inline(always)]
88    #[must_use]
89    pub fn sar_cocpu_sw_int_clr(&mut self) -> SAR_COCPU_SW_INT_CLR_W<SAR_COCPU_INT_CLR_SPEC> {
90        SAR_COCPU_SW_INT_CLR_W::new(self, 7)
91    }
92    #[doc = "Bit 8 - int clear of super watch dog"]
93    #[inline(always)]
94    #[must_use]
95    pub fn sar_cocpu_swd_int_clr(&mut self) -> SAR_COCPU_SWD_INT_CLR_W<SAR_COCPU_INT_CLR_SPEC> {
96        SAR_COCPU_SWD_INT_CLR_W::new(self, 8)
97    }
98    #[doc = "Bit 9 - int clear of timeout done"]
99    #[inline(always)]
100    #[must_use]
101    pub fn sar_cocpu_touch_timeout_int_clr(
102        &mut self,
103    ) -> SAR_COCPU_TOUCH_TIMEOUT_INT_CLR_W<SAR_COCPU_INT_CLR_SPEC> {
104        SAR_COCPU_TOUCH_TIMEOUT_INT_CLR_W::new(self, 9)
105    }
106    #[doc = "Bit 10 - int clear of approach loop done"]
107    #[inline(always)]
108    #[must_use]
109    pub fn sar_cocpu_touch_approach_loop_done_int_clr(
110        &mut self,
111    ) -> SAR_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_CLR_W<SAR_COCPU_INT_CLR_SPEC> {
112        SAR_COCPU_TOUCH_APPROACH_LOOP_DONE_INT_CLR_W::new(self, 10)
113    }
114    #[doc = "Bit 11 - int clear of touch scan done"]
115    #[inline(always)]
116    #[must_use]
117    pub fn sar_cocpu_touch_scan_done_int_clr(
118        &mut self,
119    ) -> SAR_COCPU_TOUCH_SCAN_DONE_INT_CLR_W<SAR_COCPU_INT_CLR_SPEC> {
120        SAR_COCPU_TOUCH_SCAN_DONE_INT_CLR_W::new(self, 11)
121    }
122}
123#[doc = "the interrupt clear of ulp\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sar_cocpu_int_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
124pub struct SAR_COCPU_INT_CLR_SPEC;
125impl crate::RegisterSpec for SAR_COCPU_INT_CLR_SPEC {
126    type Ux = u32;
127}
128#[doc = "`write(|w| ..)` method takes [`sar_cocpu_int_clr::W`](W) writer structure"]
129impl crate::Writable for SAR_COCPU_INT_CLR_SPEC {
130    type Safety = crate::Unsafe;
131    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
132    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
133}
134#[doc = "`reset()` method sets SAR_COCPU_INT_CLR to value 0"]
135impl crate::Resettable for SAR_COCPU_INT_CLR_SPEC {
136    const RESET_VALUE: u32 = 0;
137}
esp32s3_ulp/sens/sar_cocpu_int_clr.rs

esp32s3_ulp/sens/
sar_cocpu_int_clr.rs
