esp32s3_ulp/rtc_io/
rtc_debug_sel.rs1#[doc = "Register `RTC_DEBUG_SEL` reader"]
2pub type R = crate::R<RTC_DEBUG_SEL_SPEC>;
3#[doc = "Register `RTC_DEBUG_SEL` writer"]
4pub type W = crate::W<RTC_DEBUG_SEL_SPEC>;
5#[doc = "Field `DEBUG_SEL0` reader - configure rtc debug"]
6pub type DEBUG_SEL0_R = crate::FieldReader;
7#[doc = "Field `DEBUG_SEL0` writer - configure rtc debug"]
8pub type DEBUG_SEL0_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
9#[doc = "Field `DEBUG_SEL1` reader - configure rtc debug"]
10pub type DEBUG_SEL1_R = crate::FieldReader;
11#[doc = "Field `DEBUG_SEL1` writer - configure rtc debug"]
12pub type DEBUG_SEL1_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
13#[doc = "Field `DEBUG_SEL2` reader - configure rtc debug"]
14pub type DEBUG_SEL2_R = crate::FieldReader;
15#[doc = "Field `DEBUG_SEL2` writer - configure rtc debug"]
16pub type DEBUG_SEL2_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
17#[doc = "Field `DEBUG_SEL3` reader - configure rtc debug"]
18pub type DEBUG_SEL3_R = crate::FieldReader;
19#[doc = "Field `DEBUG_SEL3` writer - configure rtc debug"]
20pub type DEBUG_SEL3_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
21#[doc = "Field `DEBUG_SEL4` reader - configure rtc debug"]
22pub type DEBUG_SEL4_R = crate::FieldReader;
23#[doc = "Field `DEBUG_SEL4` writer - configure rtc debug"]
24pub type DEBUG_SEL4_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
25#[doc = "Field `DEBUG_12M_NO_GATING` reader - configure rtc debug"]
26pub type DEBUG_12M_NO_GATING_R = crate::BitReader;
27#[doc = "Field `DEBUG_12M_NO_GATING` writer - configure rtc debug"]
28pub type DEBUG_12M_NO_GATING_W<'a, REG> = crate::BitWriter<'a, REG>;
29impl R {
30 #[doc = "Bits 0:4 - configure rtc debug"]
31 #[inline(always)]
32 pub fn debug_sel0(&self) -> DEBUG_SEL0_R {
33 DEBUG_SEL0_R::new((self.bits & 0x1f) as u8)
34 }
35 #[doc = "Bits 5:9 - configure rtc debug"]
36 #[inline(always)]
37 pub fn debug_sel1(&self) -> DEBUG_SEL1_R {
38 DEBUG_SEL1_R::new(((self.bits >> 5) & 0x1f) as u8)
39 }
40 #[doc = "Bits 10:14 - configure rtc debug"]
41 #[inline(always)]
42 pub fn debug_sel2(&self) -> DEBUG_SEL2_R {
43 DEBUG_SEL2_R::new(((self.bits >> 10) & 0x1f) as u8)
44 }
45 #[doc = "Bits 15:19 - configure rtc debug"]
46 #[inline(always)]
47 pub fn debug_sel3(&self) -> DEBUG_SEL3_R {
48 DEBUG_SEL3_R::new(((self.bits >> 15) & 0x1f) as u8)
49 }
50 #[doc = "Bits 20:24 - configure rtc debug"]
51 #[inline(always)]
52 pub fn debug_sel4(&self) -> DEBUG_SEL4_R {
53 DEBUG_SEL4_R::new(((self.bits >> 20) & 0x1f) as u8)
54 }
55 #[doc = "Bit 25 - configure rtc debug"]
56 #[inline(always)]
57 pub fn debug_12m_no_gating(&self) -> DEBUG_12M_NO_GATING_R {
58 DEBUG_12M_NO_GATING_R::new(((self.bits >> 25) & 1) != 0)
59 }
60}
61#[cfg(feature = "impl-register-debug")]
62impl core::fmt::Debug for R {
63 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
64 f.debug_struct("RTC_DEBUG_SEL")
65 .field("debug_sel0", &self.debug_sel0())
66 .field("debug_sel1", &self.debug_sel1())
67 .field("debug_sel2", &self.debug_sel2())
68 .field("debug_sel3", &self.debug_sel3())
69 .field("debug_sel4", &self.debug_sel4())
70 .field("debug_12m_no_gating", &self.debug_12m_no_gating())
71 .finish()
72 }
73}
74impl W {
75 #[doc = "Bits 0:4 - configure rtc debug"]
76 #[inline(always)]
77 #[must_use]
78 pub fn debug_sel0(&mut self) -> DEBUG_SEL0_W<RTC_DEBUG_SEL_SPEC> {
79 DEBUG_SEL0_W::new(self, 0)
80 }
81 #[doc = "Bits 5:9 - configure rtc debug"]
82 #[inline(always)]
83 #[must_use]
84 pub fn debug_sel1(&mut self) -> DEBUG_SEL1_W<RTC_DEBUG_SEL_SPEC> {
85 DEBUG_SEL1_W::new(self, 5)
86 }
87 #[doc = "Bits 10:14 - configure rtc debug"]
88 #[inline(always)]
89 #[must_use]
90 pub fn debug_sel2(&mut self) -> DEBUG_SEL2_W<RTC_DEBUG_SEL_SPEC> {
91 DEBUG_SEL2_W::new(self, 10)
92 }
93 #[doc = "Bits 15:19 - configure rtc debug"]
94 #[inline(always)]
95 #[must_use]
96 pub fn debug_sel3(&mut self) -> DEBUG_SEL3_W<RTC_DEBUG_SEL_SPEC> {
97 DEBUG_SEL3_W::new(self, 15)
98 }
99 #[doc = "Bits 20:24 - configure rtc debug"]
100 #[inline(always)]
101 #[must_use]
102 pub fn debug_sel4(&mut self) -> DEBUG_SEL4_W<RTC_DEBUG_SEL_SPEC> {
103 DEBUG_SEL4_W::new(self, 20)
104 }
105 #[doc = "Bit 25 - configure rtc debug"]
106 #[inline(always)]
107 #[must_use]
108 pub fn debug_12m_no_gating(&mut self) -> DEBUG_12M_NO_GATING_W<RTC_DEBUG_SEL_SPEC> {
109 DEBUG_12M_NO_GATING_W::new(self, 25)
110 }
111}
112#[doc = "configure rtc debug\n\nYou can [`read`](crate::Reg::read) this register and get [`rtc_debug_sel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rtc_debug_sel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
113pub struct RTC_DEBUG_SEL_SPEC;
114impl crate::RegisterSpec for RTC_DEBUG_SEL_SPEC {
115 type Ux = u32;
116}
117#[doc = "`read()` method returns [`rtc_debug_sel::R`](R) reader structure"]
118impl crate::Readable for RTC_DEBUG_SEL_SPEC {}
119#[doc = "`write(|w| ..)` method takes [`rtc_debug_sel::W`](W) writer structure"]
120impl crate::Writable for RTC_DEBUG_SEL_SPEC {
121 type Safety = crate::Unsafe;
122 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
123 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
124}
125#[doc = "`reset()` method sets RTC_DEBUG_SEL to value 0"]
126impl crate::Resettable for RTC_DEBUG_SEL_SPEC {
127 const RESET_VALUE: u32 = 0;
128}