esp32s3_ulp/rtc_io/
rtc_pad20.rs

1#[doc = "Register `RTC_PAD20` reader"]
2pub type R = crate::R<RTC_PAD20_SPEC>;
3#[doc = "Register `RTC_PAD20` writer"]
4pub type W = crate::W<RTC_PAD20_SPEC>;
5#[doc = "Field `FUN_IE` reader - input enable in work mode"]
6pub type FUN_IE_R = crate::BitReader;
7#[doc = "Field `FUN_IE` writer - input enable in work mode"]
8pub type FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SLP_OE` reader - output enable in sleep mode"]
10pub type SLP_OE_R = crate::BitReader;
11#[doc = "Field `SLP_OE` writer - output enable in sleep mode"]
12pub type SLP_OE_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `SLP_IE` reader - input enable in sleep mode"]
14pub type SLP_IE_R = crate::BitReader;
15#[doc = "Field `SLP_IE` writer - input enable in sleep mode"]
16pub type SLP_IE_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `SLP_SEL` reader - 1: enable sleep mode during sleep,0: no sleep mode"]
18pub type SLP_SEL_R = crate::BitReader;
19#[doc = "Field `SLP_SEL` writer - 1: enable sleep mode during sleep,0: no sleep mode"]
20pub type SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `FUN_SEL` reader - function sel"]
22pub type FUN_SEL_R = crate::FieldReader;
23#[doc = "Field `FUN_SEL` writer - function sel"]
24pub type FUN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
25#[doc = "Field `MUX_SEL` reader - 1: use RTC GPIO,0: use digital GPIO"]
26pub type MUX_SEL_R = crate::BitReader;
27#[doc = "Field `MUX_SEL` writer - 1: use RTC GPIO,0: use digital GPIO"]
28pub type MUX_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `RUE` reader - RUE"]
30pub type RUE_R = crate::BitReader;
31#[doc = "Field `RUE` writer - RUE"]
32pub type RUE_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `RDE` reader - RDE"]
34pub type RDE_R = crate::BitReader;
35#[doc = "Field `RDE` writer - RDE"]
36pub type RDE_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `DRV` reader - DRV"]
38pub type DRV_R = crate::FieldReader;
39#[doc = "Field `DRV` writer - DRV"]
40pub type DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
41impl R {
42    #[doc = "Bit 13 - input enable in work mode"]
43    #[inline(always)]
44    pub fn fun_ie(&self) -> FUN_IE_R {
45        FUN_IE_R::new(((self.bits >> 13) & 1) != 0)
46    }
47    #[doc = "Bit 14 - output enable in sleep mode"]
48    #[inline(always)]
49    pub fn slp_oe(&self) -> SLP_OE_R {
50        SLP_OE_R::new(((self.bits >> 14) & 1) != 0)
51    }
52    #[doc = "Bit 15 - input enable in sleep mode"]
53    #[inline(always)]
54    pub fn slp_ie(&self) -> SLP_IE_R {
55        SLP_IE_R::new(((self.bits >> 15) & 1) != 0)
56    }
57    #[doc = "Bit 16 - 1: enable sleep mode during sleep,0: no sleep mode"]
58    #[inline(always)]
59    pub fn slp_sel(&self) -> SLP_SEL_R {
60        SLP_SEL_R::new(((self.bits >> 16) & 1) != 0)
61    }
62    #[doc = "Bits 17:18 - function sel"]
63    #[inline(always)]
64    pub fn fun_sel(&self) -> FUN_SEL_R {
65        FUN_SEL_R::new(((self.bits >> 17) & 3) as u8)
66    }
67    #[doc = "Bit 19 - 1: use RTC GPIO,0: use digital GPIO"]
68    #[inline(always)]
69    pub fn mux_sel(&self) -> MUX_SEL_R {
70        MUX_SEL_R::new(((self.bits >> 19) & 1) != 0)
71    }
72    #[doc = "Bit 27 - RUE"]
73    #[inline(always)]
74    pub fn rue(&self) -> RUE_R {
75        RUE_R::new(((self.bits >> 27) & 1) != 0)
76    }
77    #[doc = "Bit 28 - RDE"]
78    #[inline(always)]
79    pub fn rde(&self) -> RDE_R {
80        RDE_R::new(((self.bits >> 28) & 1) != 0)
81    }
82    #[doc = "Bits 29:30 - DRV"]
83    #[inline(always)]
84    pub fn drv(&self) -> DRV_R {
85        DRV_R::new(((self.bits >> 29) & 3) as u8)
86    }
87}
88#[cfg(feature = "impl-register-debug")]
89impl core::fmt::Debug for R {
90    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
91        f.debug_struct("RTC_PAD20")
92            .field("fun_ie", &self.fun_ie())
93            .field("slp_oe", &self.slp_oe())
94            .field("slp_ie", &self.slp_ie())
95            .field("slp_sel", &self.slp_sel())
96            .field("fun_sel", &self.fun_sel())
97            .field("mux_sel", &self.mux_sel())
98            .field("rue", &self.rue())
99            .field("rde", &self.rde())
100            .field("drv", &self.drv())
101            .finish()
102    }
103}
104impl W {
105    #[doc = "Bit 13 - input enable in work mode"]
106    #[inline(always)]
107    #[must_use]
108    pub fn fun_ie(&mut self) -> FUN_IE_W<RTC_PAD20_SPEC> {
109        FUN_IE_W::new(self, 13)
110    }
111    #[doc = "Bit 14 - output enable in sleep mode"]
112    #[inline(always)]
113    #[must_use]
114    pub fn slp_oe(&mut self) -> SLP_OE_W<RTC_PAD20_SPEC> {
115        SLP_OE_W::new(self, 14)
116    }
117    #[doc = "Bit 15 - input enable in sleep mode"]
118    #[inline(always)]
119    #[must_use]
120    pub fn slp_ie(&mut self) -> SLP_IE_W<RTC_PAD20_SPEC> {
121        SLP_IE_W::new(self, 15)
122    }
123    #[doc = "Bit 16 - 1: enable sleep mode during sleep,0: no sleep mode"]
124    #[inline(always)]
125    #[must_use]
126    pub fn slp_sel(&mut self) -> SLP_SEL_W<RTC_PAD20_SPEC> {
127        SLP_SEL_W::new(self, 16)
128    }
129    #[doc = "Bits 17:18 - function sel"]
130    #[inline(always)]
131    #[must_use]
132    pub fn fun_sel(&mut self) -> FUN_SEL_W<RTC_PAD20_SPEC> {
133        FUN_SEL_W::new(self, 17)
134    }
135    #[doc = "Bit 19 - 1: use RTC GPIO,0: use digital GPIO"]
136    #[inline(always)]
137    #[must_use]
138    pub fn mux_sel(&mut self) -> MUX_SEL_W<RTC_PAD20_SPEC> {
139        MUX_SEL_W::new(self, 19)
140    }
141    #[doc = "Bit 27 - RUE"]
142    #[inline(always)]
143    #[must_use]
144    pub fn rue(&mut self) -> RUE_W<RTC_PAD20_SPEC> {
145        RUE_W::new(self, 27)
146    }
147    #[doc = "Bit 28 - RDE"]
148    #[inline(always)]
149    #[must_use]
150    pub fn rde(&mut self) -> RDE_W<RTC_PAD20_SPEC> {
151        RDE_W::new(self, 28)
152    }
153    #[doc = "Bits 29:30 - DRV"]
154    #[inline(always)]
155    #[must_use]
156    pub fn drv(&mut self) -> DRV_W<RTC_PAD20_SPEC> {
157        DRV_W::new(self, 29)
158    }
159}
160#[doc = "configure RTC PAD20\n\nYou can [`read`](crate::Reg::read) this register and get [`rtc_pad20::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rtc_pad20::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
161pub struct RTC_PAD20_SPEC;
162impl crate::RegisterSpec for RTC_PAD20_SPEC {
163    type Ux = u32;
164}
165#[doc = "`read()` method returns [`rtc_pad20::R`](R) reader structure"]
166impl crate::Readable for RTC_PAD20_SPEC {}
167#[doc = "`write(|w| ..)` method takes [`rtc_pad20::W`](W) writer structure"]
168impl crate::Writable for RTC_PAD20_SPEC {
169    type Safety = crate::Unsafe;
170    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
171    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
172}
173#[doc = "`reset()` method sets RTC_PAD20 to value 0x5000_0000"]
174impl crate::Resettable for RTC_PAD20_SPEC {
175    const RESET_VALUE: u32 = 0x5000_0000;
176}
esp32s3_ulp/rtc_io/rtc_pad20.rs

esp32s3_ulp/rtc_io/
rtc_pad20.rs
