esp32s3_ulp/rtc_io/
enable_w1tc.rs

1#[doc = "Register `ENABLE_W1TC` writer"]
2pub type W = crate::W<ENABLE_W1TC_SPEC>;
3#[doc = "Field `GPIO_ENABLE_W1TC` writer - RTC GPIO 0 ~ 21 enable write 1 to clear"]
4pub type GPIO_ENABLE_W1TC_W<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>;
5#[cfg(feature = "impl-register-debug")]
6impl core::fmt::Debug for crate::generic::Reg<ENABLE_W1TC_SPEC> {
7    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
8        write!(f, "(not readable)")
9    }
10}
11impl W {
12    #[doc = "Bits 10:31 - RTC GPIO 0 ~ 21 enable write 1 to clear"]
13    #[inline(always)]
14    #[must_use]
15    pub fn gpio_enable_w1tc(&mut self) -> GPIO_ENABLE_W1TC_W<ENABLE_W1TC_SPEC> {
16        GPIO_ENABLE_W1TC_W::new(self, 10)
17    }
18}
19#[doc = "one clear RTC GPIO output enable\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`enable_w1tc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
20pub struct ENABLE_W1TC_SPEC;
21impl crate::RegisterSpec for ENABLE_W1TC_SPEC {
22    type Ux = u32;
23}
24#[doc = "`write(|w| ..)` method takes [`enable_w1tc::W`](W) writer structure"]
25impl crate::Writable for ENABLE_W1TC_SPEC {
26    type Safety = crate::Unsafe;
27    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
28    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
29}
30#[doc = "`reset()` method sets ENABLE_W1TC to value 0"]
31impl crate::Resettable for ENABLE_W1TC_SPEC {
32    const RESET_VALUE: u32 = 0;
33}
esp32s3_ulp/rtc_io/enable_w1tc.rs

esp32s3_ulp/rtc_io/
enable_w1tc.rs
