esp32s3_ulp/rtc_io/
pin5.rs

1#[doc = "Register `PIN5` reader"]
2pub type R = crate::R<PIN5_SPEC>;
3#[doc = "Register `PIN5` writer"]
4pub type W = crate::W<PIN5_SPEC>;
5#[doc = "Field `PAD_DRIVER` reader - if set to 0: normal output, if set to 1: open drain"]
6pub type PAD_DRIVER_R = crate::BitReader;
7#[doc = "Field `PAD_DRIVER` writer - if set to 0: normal output, if set to 1: open drain"]
8pub type PAD_DRIVER_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `INT_TYPE` reader - if set to 0: GPIO interrupt disable, if set to 1: rising edge trigger, if set to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low level trigger, if set to 5: high level trigger"]
10pub type INT_TYPE_R = crate::FieldReader;
11#[doc = "Field `INT_TYPE` writer - if set to 0: GPIO interrupt disable, if set to 1: rising edge trigger, if set to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low level trigger, if set to 5: high level trigger"]
12pub type INT_TYPE_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
13#[doc = "Field `WAKEUP_ENABLE` reader - RTC GPIO wakeup enable bit"]
14pub type WAKEUP_ENABLE_R = crate::BitReader;
15#[doc = "Field `WAKEUP_ENABLE` writer - RTC GPIO wakeup enable bit"]
16pub type WAKEUP_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    #[doc = "Bit 2 - if set to 0: normal output, if set to 1: open drain"]
19    #[inline(always)]
20    pub fn pad_driver(&self) -> PAD_DRIVER_R {
21        PAD_DRIVER_R::new(((self.bits >> 2) & 1) != 0)
22    }
23    #[doc = "Bits 7:9 - if set to 0: GPIO interrupt disable, if set to 1: rising edge trigger, if set to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low level trigger, if set to 5: high level trigger"]
24    #[inline(always)]
25    pub fn int_type(&self) -> INT_TYPE_R {
26        INT_TYPE_R::new(((self.bits >> 7) & 7) as u8)
27    }
28    #[doc = "Bit 10 - RTC GPIO wakeup enable bit"]
29    #[inline(always)]
30    pub fn wakeup_enable(&self) -> WAKEUP_ENABLE_R {
31        WAKEUP_ENABLE_R::new(((self.bits >> 10) & 1) != 0)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("PIN5")
38            .field("pad_driver", &self.pad_driver())
39            .field("int_type", &self.int_type())
40            .field("wakeup_enable", &self.wakeup_enable())
41            .finish()
42    }
43}
44impl W {
45    #[doc = "Bit 2 - if set to 0: normal output, if set to 1: open drain"]
46    #[inline(always)]
47    #[must_use]
48    pub fn pad_driver(&mut self) -> PAD_DRIVER_W<PIN5_SPEC> {
49        PAD_DRIVER_W::new(self, 2)
50    }
51    #[doc = "Bits 7:9 - if set to 0: GPIO interrupt disable, if set to 1: rising edge trigger, if set to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low level trigger, if set to 5: high level trigger"]
52    #[inline(always)]
53    #[must_use]
54    pub fn int_type(&mut self) -> INT_TYPE_W<PIN5_SPEC> {
55        INT_TYPE_W::new(self, 7)
56    }
57    #[doc = "Bit 10 - RTC GPIO wakeup enable bit"]
58    #[inline(always)]
59    #[must_use]
60    pub fn wakeup_enable(&mut self) -> WAKEUP_ENABLE_W<PIN5_SPEC> {
61        WAKEUP_ENABLE_W::new(self, 10)
62    }
63}
64#[doc = "configure RTC GPIO5\n\nYou can [`read`](crate::Reg::read) this register and get [`pin5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pin5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
65pub struct PIN5_SPEC;
66impl crate::RegisterSpec for PIN5_SPEC {
67    type Ux = u32;
68}
69#[doc = "`read()` method returns [`pin5::R`](R) reader structure"]
70impl crate::Readable for PIN5_SPEC {}
71#[doc = "`write(|w| ..)` method takes [`pin5::W`](W) writer structure"]
72impl crate::Writable for PIN5_SPEC {
73    type Safety = crate::Unsafe;
74    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
75    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
76}
77#[doc = "`reset()` method sets PIN5 to value 0"]
78impl crate::Resettable for PIN5_SPEC {
79    const RESET_VALUE: u32 = 0;
80}
esp32s3_ulp/rtc_io/pin5.rs

esp32s3_ulp/rtc_io/
pin5.rs
