esp32s3_ulp/rtc_io/
pad_dac2.rs1#[doc = "Register `PAD_DAC2` reader"]
2pub type R = crate::R<PAD_DAC2_SPEC>;
3#[doc = "Register `PAD_DAC2` writer"]
4pub type W = crate::W<PAD_DAC2_SPEC>;
5#[doc = "Field `PDAC2_DAC` reader - PDAC2_DAC"]
6pub type PDAC2_DAC_R = crate::FieldReader;
7#[doc = "Field `PDAC2_DAC` writer - PDAC2_DAC"]
8pub type PDAC2_DAC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `PDAC2_XPD_DAC` reader - PDAC2_XPD_DAC"]
10pub type PDAC2_XPD_DAC_R = crate::BitReader;
11#[doc = "Field `PDAC2_XPD_DAC` writer - PDAC2_XPD_DAC"]
12pub type PDAC2_XPD_DAC_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `PDAC2_DAC_XPD_FORCE` reader - 1: use reg_pdac2_xpd_dac to control PDAC2_XPD_DAC,0: use SAR ADC FSM to control PDAC2_XPD_DAC"]
14pub type PDAC2_DAC_XPD_FORCE_R = crate::BitReader;
15#[doc = "Field `PDAC2_DAC_XPD_FORCE` writer - 1: use reg_pdac2_xpd_dac to control PDAC2_XPD_DAC,0: use SAR ADC FSM to control PDAC2_XPD_DAC"]
16pub type PDAC2_DAC_XPD_FORCE_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `PDAC2_FUN_IE` reader - input enable in work mode"]
18pub type PDAC2_FUN_IE_R = crate::BitReader;
19#[doc = "Field `PDAC2_FUN_IE` writer - input enable in work mode"]
20pub type PDAC2_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `PDAC2_SLP_OE` reader - output enable in sleep mode"]
22pub type PDAC2_SLP_OE_R = crate::BitReader;
23#[doc = "Field `PDAC2_SLP_OE` writer - output enable in sleep mode"]
24pub type PDAC2_SLP_OE_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `PDAC2_SLP_IE` reader - input enable in sleep mode"]
26pub type PDAC2_SLP_IE_R = crate::BitReader;
27#[doc = "Field `PDAC2_SLP_IE` writer - input enable in sleep mode"]
28pub type PDAC2_SLP_IE_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `PDAC2_SLP_SEL` reader - 1: enable sleep mode during sleep,0: no sleep mode"]
30pub type PDAC2_SLP_SEL_R = crate::BitReader;
31#[doc = "Field `PDAC2_SLP_SEL` writer - 1: enable sleep mode during sleep,0: no sleep mode"]
32pub type PDAC2_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `PDAC2_FUN_SEL` reader - PDAC1 function sel"]
34pub type PDAC2_FUN_SEL_R = crate::FieldReader;
35#[doc = "Field `PDAC2_FUN_SEL` writer - PDAC1 function sel"]
36pub type PDAC2_FUN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
37#[doc = "Field `PDAC2_MUX_SEL` reader - 1: use RTC GPIO,0: use digital GPIO"]
38pub type PDAC2_MUX_SEL_R = crate::BitReader;
39#[doc = "Field `PDAC2_MUX_SEL` writer - 1: use RTC GPIO,0: use digital GPIO"]
40pub type PDAC2_MUX_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `PDAC2_RUE` reader - PDAC2_RUE"]
42pub type PDAC2_RUE_R = crate::BitReader;
43#[doc = "Field `PDAC2_RUE` writer - PDAC2_RUE"]
44pub type PDAC2_RUE_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `PDAC2_RDE` reader - PDAC2_RDE"]
46pub type PDAC2_RDE_R = crate::BitReader;
47#[doc = "Field `PDAC2_RDE` writer - PDAC2_RDE"]
48pub type PDAC2_RDE_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `PDAC2_DRV` reader - PDAC2_DRV"]
50pub type PDAC2_DRV_R = crate::FieldReader;
51#[doc = "Field `PDAC2_DRV` writer - PDAC2_DRV"]
52pub type PDAC2_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
53impl R {
54 #[doc = "Bits 3:10 - PDAC2_DAC"]
55 #[inline(always)]
56 pub fn pdac2_dac(&self) -> PDAC2_DAC_R {
57 PDAC2_DAC_R::new(((self.bits >> 3) & 0xff) as u8)
58 }
59 #[doc = "Bit 11 - PDAC2_XPD_DAC"]
60 #[inline(always)]
61 pub fn pdac2_xpd_dac(&self) -> PDAC2_XPD_DAC_R {
62 PDAC2_XPD_DAC_R::new(((self.bits >> 11) & 1) != 0)
63 }
64 #[doc = "Bit 12 - 1: use reg_pdac2_xpd_dac to control PDAC2_XPD_DAC,0: use SAR ADC FSM to control PDAC2_XPD_DAC"]
65 #[inline(always)]
66 pub fn pdac2_dac_xpd_force(&self) -> PDAC2_DAC_XPD_FORCE_R {
67 PDAC2_DAC_XPD_FORCE_R::new(((self.bits >> 12) & 1) != 0)
68 }
69 #[doc = "Bit 13 - input enable in work mode"]
70 #[inline(always)]
71 pub fn pdac2_fun_ie(&self) -> PDAC2_FUN_IE_R {
72 PDAC2_FUN_IE_R::new(((self.bits >> 13) & 1) != 0)
73 }
74 #[doc = "Bit 14 - output enable in sleep mode"]
75 #[inline(always)]
76 pub fn pdac2_slp_oe(&self) -> PDAC2_SLP_OE_R {
77 PDAC2_SLP_OE_R::new(((self.bits >> 14) & 1) != 0)
78 }
79 #[doc = "Bit 15 - input enable in sleep mode"]
80 #[inline(always)]
81 pub fn pdac2_slp_ie(&self) -> PDAC2_SLP_IE_R {
82 PDAC2_SLP_IE_R::new(((self.bits >> 15) & 1) != 0)
83 }
84 #[doc = "Bit 16 - 1: enable sleep mode during sleep,0: no sleep mode"]
85 #[inline(always)]
86 pub fn pdac2_slp_sel(&self) -> PDAC2_SLP_SEL_R {
87 PDAC2_SLP_SEL_R::new(((self.bits >> 16) & 1) != 0)
88 }
89 #[doc = "Bits 17:18 - PDAC1 function sel"]
90 #[inline(always)]
91 pub fn pdac2_fun_sel(&self) -> PDAC2_FUN_SEL_R {
92 PDAC2_FUN_SEL_R::new(((self.bits >> 17) & 3) as u8)
93 }
94 #[doc = "Bit 19 - 1: use RTC GPIO,0: use digital GPIO"]
95 #[inline(always)]
96 pub fn pdac2_mux_sel(&self) -> PDAC2_MUX_SEL_R {
97 PDAC2_MUX_SEL_R::new(((self.bits >> 19) & 1) != 0)
98 }
99 #[doc = "Bit 27 - PDAC2_RUE"]
100 #[inline(always)]
101 pub fn pdac2_rue(&self) -> PDAC2_RUE_R {
102 PDAC2_RUE_R::new(((self.bits >> 27) & 1) != 0)
103 }
104 #[doc = "Bit 28 - PDAC2_RDE"]
105 #[inline(always)]
106 pub fn pdac2_rde(&self) -> PDAC2_RDE_R {
107 PDAC2_RDE_R::new(((self.bits >> 28) & 1) != 0)
108 }
109 #[doc = "Bits 29:30 - PDAC2_DRV"]
110 #[inline(always)]
111 pub fn pdac2_drv(&self) -> PDAC2_DRV_R {
112 PDAC2_DRV_R::new(((self.bits >> 29) & 3) as u8)
113 }
114}
115#[cfg(feature = "impl-register-debug")]
116impl core::fmt::Debug for R {
117 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
118 f.debug_struct("PAD_DAC2")
119 .field("pdac2_dac", &self.pdac2_dac())
120 .field("pdac2_xpd_dac", &self.pdac2_xpd_dac())
121 .field("pdac2_dac_xpd_force", &self.pdac2_dac_xpd_force())
122 .field("pdac2_fun_ie", &self.pdac2_fun_ie())
123 .field("pdac2_slp_oe", &self.pdac2_slp_oe())
124 .field("pdac2_slp_ie", &self.pdac2_slp_ie())
125 .field("pdac2_slp_sel", &self.pdac2_slp_sel())
126 .field("pdac2_fun_sel", &self.pdac2_fun_sel())
127 .field("pdac2_mux_sel", &self.pdac2_mux_sel())
128 .field("pdac2_rue", &self.pdac2_rue())
129 .field("pdac2_rde", &self.pdac2_rde())
130 .field("pdac2_drv", &self.pdac2_drv())
131 .finish()
132 }
133}
134impl W {
135 #[doc = "Bits 3:10 - PDAC2_DAC"]
136 #[inline(always)]
137 #[must_use]
138 pub fn pdac2_dac(&mut self) -> PDAC2_DAC_W<PAD_DAC2_SPEC> {
139 PDAC2_DAC_W::new(self, 3)
140 }
141 #[doc = "Bit 11 - PDAC2_XPD_DAC"]
142 #[inline(always)]
143 #[must_use]
144 pub fn pdac2_xpd_dac(&mut self) -> PDAC2_XPD_DAC_W<PAD_DAC2_SPEC> {
145 PDAC2_XPD_DAC_W::new(self, 11)
146 }
147 #[doc = "Bit 12 - 1: use reg_pdac2_xpd_dac to control PDAC2_XPD_DAC,0: use SAR ADC FSM to control PDAC2_XPD_DAC"]
148 #[inline(always)]
149 #[must_use]
150 pub fn pdac2_dac_xpd_force(&mut self) -> PDAC2_DAC_XPD_FORCE_W<PAD_DAC2_SPEC> {
151 PDAC2_DAC_XPD_FORCE_W::new(self, 12)
152 }
153 #[doc = "Bit 13 - input enable in work mode"]
154 #[inline(always)]
155 #[must_use]
156 pub fn pdac2_fun_ie(&mut self) -> PDAC2_FUN_IE_W<PAD_DAC2_SPEC> {
157 PDAC2_FUN_IE_W::new(self, 13)
158 }
159 #[doc = "Bit 14 - output enable in sleep mode"]
160 #[inline(always)]
161 #[must_use]
162 pub fn pdac2_slp_oe(&mut self) -> PDAC2_SLP_OE_W<PAD_DAC2_SPEC> {
163 PDAC2_SLP_OE_W::new(self, 14)
164 }
165 #[doc = "Bit 15 - input enable in sleep mode"]
166 #[inline(always)]
167 #[must_use]
168 pub fn pdac2_slp_ie(&mut self) -> PDAC2_SLP_IE_W<PAD_DAC2_SPEC> {
169 PDAC2_SLP_IE_W::new(self, 15)
170 }
171 #[doc = "Bit 16 - 1: enable sleep mode during sleep,0: no sleep mode"]
172 #[inline(always)]
173 #[must_use]
174 pub fn pdac2_slp_sel(&mut self) -> PDAC2_SLP_SEL_W<PAD_DAC2_SPEC> {
175 PDAC2_SLP_SEL_W::new(self, 16)
176 }
177 #[doc = "Bits 17:18 - PDAC1 function sel"]
178 #[inline(always)]
179 #[must_use]
180 pub fn pdac2_fun_sel(&mut self) -> PDAC2_FUN_SEL_W<PAD_DAC2_SPEC> {
181 PDAC2_FUN_SEL_W::new(self, 17)
182 }
183 #[doc = "Bit 19 - 1: use RTC GPIO,0: use digital GPIO"]
184 #[inline(always)]
185 #[must_use]
186 pub fn pdac2_mux_sel(&mut self) -> PDAC2_MUX_SEL_W<PAD_DAC2_SPEC> {
187 PDAC2_MUX_SEL_W::new(self, 19)
188 }
189 #[doc = "Bit 27 - PDAC2_RUE"]
190 #[inline(always)]
191 #[must_use]
192 pub fn pdac2_rue(&mut self) -> PDAC2_RUE_W<PAD_DAC2_SPEC> {
193 PDAC2_RUE_W::new(self, 27)
194 }
195 #[doc = "Bit 28 - PDAC2_RDE"]
196 #[inline(always)]
197 #[must_use]
198 pub fn pdac2_rde(&mut self) -> PDAC2_RDE_W<PAD_DAC2_SPEC> {
199 PDAC2_RDE_W::new(self, 28)
200 }
201 #[doc = "Bits 29:30 - PDAC2_DRV"]
202 #[inline(always)]
203 #[must_use]
204 pub fn pdac2_drv(&mut self) -> PDAC2_DRV_W<PAD_DAC2_SPEC> {
205 PDAC2_DRV_W::new(self, 29)
206 }
207}
208#[doc = "configure RTC PAD18\n\nYou can [`read`](crate::Reg::read) this register and get [`pad_dac2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pad_dac2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
209pub struct PAD_DAC2_SPEC;
210impl crate::RegisterSpec for PAD_DAC2_SPEC {
211 type Ux = u32;
212}
213#[doc = "`read()` method returns [`pad_dac2::R`](R) reader structure"]
214impl crate::Readable for PAD_DAC2_SPEC {}
215#[doc = "`write(|w| ..)` method takes [`pad_dac2::W`](W) writer structure"]
216impl crate::Writable for PAD_DAC2_SPEC {
217 type Safety = crate::Unsafe;
218 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
219 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
220}
221#[doc = "`reset()` method sets PAD_DAC2 to value 0x4000_0000"]
222impl crate::Resettable for PAD_DAC2_SPEC {
223 const RESET_VALUE: u32 = 0x4000_0000;
224}