esp32s3_ulp/rtc_i2c/
int_raw.rs

1#[doc = "Register `INT_RAW` reader"]
2pub type R = crate::R<INT_RAW_SPEC>;
3#[doc = "Field `SLAVE_TRAN_COMP` reader - slave transit complete interrupt raw"]
4pub type SLAVE_TRAN_COMP_R = crate::BitReader;
5#[doc = "Field `ARBITRATION_LOST` reader - arbitration lost interrupt raw"]
6pub type ARBITRATION_LOST_R = crate::BitReader;
7#[doc = "Field `MASTER_TRAN_COMP` reader - master transit complete interrupt raw"]
8pub type MASTER_TRAN_COMP_R = crate::BitReader;
9#[doc = "Field `TRANS_COMPLETE` reader - transit complete interrupt raw"]
10pub type TRANS_COMPLETE_R = crate::BitReader;
11#[doc = "Field `TIME_OUT` reader - time out interrupt raw"]
12pub type TIME_OUT_R = crate::BitReader;
13#[doc = "Field `ACK_ERR` reader - ack error interrupt raw"]
14pub type ACK_ERR_R = crate::BitReader;
15#[doc = "Field `RX_DATA` reader - receive data interrupt raw"]
16pub type RX_DATA_R = crate::BitReader;
17#[doc = "Field `TX_DATA` reader - transit data interrupt raw"]
18pub type TX_DATA_R = crate::BitReader;
19#[doc = "Field `DETECT_START` reader - detect start interrupt raw"]
20pub type DETECT_START_R = crate::BitReader;
21impl R {
22    #[doc = "Bit 0 - slave transit complete interrupt raw"]
23    #[inline(always)]
24    pub fn slave_tran_comp(&self) -> SLAVE_TRAN_COMP_R {
25        SLAVE_TRAN_COMP_R::new((self.bits & 1) != 0)
26    }
27    #[doc = "Bit 1 - arbitration lost interrupt raw"]
28    #[inline(always)]
29    pub fn arbitration_lost(&self) -> ARBITRATION_LOST_R {
30        ARBITRATION_LOST_R::new(((self.bits >> 1) & 1) != 0)
31    }
32    #[doc = "Bit 2 - master transit complete interrupt raw"]
33    #[inline(always)]
34    pub fn master_tran_comp(&self) -> MASTER_TRAN_COMP_R {
35        MASTER_TRAN_COMP_R::new(((self.bits >> 2) & 1) != 0)
36    }
37    #[doc = "Bit 3 - transit complete interrupt raw"]
38    #[inline(always)]
39    pub fn trans_complete(&self) -> TRANS_COMPLETE_R {
40        TRANS_COMPLETE_R::new(((self.bits >> 3) & 1) != 0)
41    }
42    #[doc = "Bit 4 - time out interrupt raw"]
43    #[inline(always)]
44    pub fn time_out(&self) -> TIME_OUT_R {
45        TIME_OUT_R::new(((self.bits >> 4) & 1) != 0)
46    }
47    #[doc = "Bit 5 - ack error interrupt raw"]
48    #[inline(always)]
49    pub fn ack_err(&self) -> ACK_ERR_R {
50        ACK_ERR_R::new(((self.bits >> 5) & 1) != 0)
51    }
52    #[doc = "Bit 6 - receive data interrupt raw"]
53    #[inline(always)]
54    pub fn rx_data(&self) -> RX_DATA_R {
55        RX_DATA_R::new(((self.bits >> 6) & 1) != 0)
56    }
57    #[doc = "Bit 7 - transit data interrupt raw"]
58    #[inline(always)]
59    pub fn tx_data(&self) -> TX_DATA_R {
60        TX_DATA_R::new(((self.bits >> 7) & 1) != 0)
61    }
62    #[doc = "Bit 8 - detect start interrupt raw"]
63    #[inline(always)]
64    pub fn detect_start(&self) -> DETECT_START_R {
65        DETECT_START_R::new(((self.bits >> 8) & 1) != 0)
66    }
67}
68#[cfg(feature = "impl-register-debug")]
69impl core::fmt::Debug for R {
70    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
71        f.debug_struct("INT_RAW")
72            .field("slave_tran_comp", &self.slave_tran_comp())
73            .field("arbitration_lost", &self.arbitration_lost())
74            .field("master_tran_comp", &self.master_tran_comp())
75            .field("trans_complete", &self.trans_complete())
76            .field("time_out", &self.time_out())
77            .field("ack_err", &self.ack_err())
78            .field("rx_data", &self.rx_data())
79            .field("tx_data", &self.tx_data())
80            .field("detect_start", &self.detect_start())
81            .finish()
82    }
83}
84#[doc = "interrupt raw register\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
85pub struct INT_RAW_SPEC;
86impl crate::RegisterSpec for INT_RAW_SPEC {
87    type Ux = u32;
88}
89#[doc = "`read()` method returns [`int_raw::R`](R) reader structure"]
90impl crate::Readable for INT_RAW_SPEC {}
91#[doc = "`reset()` method sets INT_RAW to value 0"]
92impl crate::Resettable for INT_RAW_SPEC {
93    const RESET_VALUE: u32 = 0;
94}
esp32s3_ulp/rtc_i2c/int_raw.rs

esp32s3_ulp/rtc_i2c/
int_raw.rs
