esp32s3_ulp/rtc_cntl/
rtc_ulp_cp_ctrl.rs

1#[doc = "Register `RTC_ULP_CP_CTRL` reader"]
2pub type R = crate::R<RTC_ULP_CP_CTRL_SPEC>;
3#[doc = "Register `RTC_ULP_CP_CTRL` writer"]
4pub type W = crate::W<RTC_ULP_CP_CTRL_SPEC>;
5#[doc = "Field `ULP_CP_MEM_ADDR_INIT` reader - No public"]
6pub type ULP_CP_MEM_ADDR_INIT_R = crate::FieldReader<u16>;
7#[doc = "Field `ULP_CP_MEM_ADDR_INIT` writer - No public"]
8pub type ULP_CP_MEM_ADDR_INIT_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>;
9#[doc = "Field `ULP_CP_MEM_ADDR_SIZE` reader - No public"]
10pub type ULP_CP_MEM_ADDR_SIZE_R = crate::FieldReader<u16>;
11#[doc = "Field `ULP_CP_MEM_ADDR_SIZE` writer - No public"]
12pub type ULP_CP_MEM_ADDR_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>;
13#[doc = "Field `ULP_CP_MEM_OFFST_CLR` writer - No public"]
14pub type ULP_CP_MEM_OFFST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `ULP_CP_CLK_FO` reader - ulp coprocessor clk force on"]
16pub type ULP_CP_CLK_FO_R = crate::BitReader;
17#[doc = "Field `ULP_CP_CLK_FO` writer - ulp coprocessor clk force on"]
18pub type ULP_CP_CLK_FO_W<'a, REG> = crate::BitWriter<'a, REG>;
19#[doc = "Field `ULP_CP_RESET` reader - ulp coprocessor clk software reset"]
20pub type ULP_CP_RESET_R = crate::BitReader;
21#[doc = "Field `ULP_CP_RESET` writer - ulp coprocessor clk software reset"]
22pub type ULP_CP_RESET_W<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `ULP_CP_FORCE_START_TOP` reader - 1: ULP-coprocessor is started by SW"]
24pub type ULP_CP_FORCE_START_TOP_R = crate::BitReader;
25#[doc = "Field `ULP_CP_FORCE_START_TOP` writer - 1: ULP-coprocessor is started by SW"]
26pub type ULP_CP_FORCE_START_TOP_W<'a, REG> = crate::BitWriter<'a, REG>;
27#[doc = "Field `ULP_CP_START_TOP` reader - Write 1 to start ULP-coprocessor"]
28pub type ULP_CP_START_TOP_R = crate::BitReader;
29#[doc = "Field `ULP_CP_START_TOP` writer - Write 1 to start ULP-coprocessor"]
30pub type ULP_CP_START_TOP_W<'a, REG> = crate::BitWriter<'a, REG>;
31impl R {
32    #[doc = "Bits 0:10 - No public"]
33    #[inline(always)]
34    pub fn ulp_cp_mem_addr_init(&self) -> ULP_CP_MEM_ADDR_INIT_R {
35        ULP_CP_MEM_ADDR_INIT_R::new((self.bits & 0x07ff) as u16)
36    }
37    #[doc = "Bits 11:21 - No public"]
38    #[inline(always)]
39    pub fn ulp_cp_mem_addr_size(&self) -> ULP_CP_MEM_ADDR_SIZE_R {
40        ULP_CP_MEM_ADDR_SIZE_R::new(((self.bits >> 11) & 0x07ff) as u16)
41    }
42    #[doc = "Bit 28 - ulp coprocessor clk force on"]
43    #[inline(always)]
44    pub fn ulp_cp_clk_fo(&self) -> ULP_CP_CLK_FO_R {
45        ULP_CP_CLK_FO_R::new(((self.bits >> 28) & 1) != 0)
46    }
47    #[doc = "Bit 29 - ulp coprocessor clk software reset"]
48    #[inline(always)]
49    pub fn ulp_cp_reset(&self) -> ULP_CP_RESET_R {
50        ULP_CP_RESET_R::new(((self.bits >> 29) & 1) != 0)
51    }
52    #[doc = "Bit 30 - 1: ULP-coprocessor is started by SW"]
53    #[inline(always)]
54    pub fn ulp_cp_force_start_top(&self) -> ULP_CP_FORCE_START_TOP_R {
55        ULP_CP_FORCE_START_TOP_R::new(((self.bits >> 30) & 1) != 0)
56    }
57    #[doc = "Bit 31 - Write 1 to start ULP-coprocessor"]
58    #[inline(always)]
59    pub fn ulp_cp_start_top(&self) -> ULP_CP_START_TOP_R {
60        ULP_CP_START_TOP_R::new(((self.bits >> 31) & 1) != 0)
61    }
62}
63#[cfg(feature = "impl-register-debug")]
64impl core::fmt::Debug for R {
65    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
66        f.debug_struct("RTC_ULP_CP_CTRL")
67            .field("ulp_cp_mem_addr_init", &self.ulp_cp_mem_addr_init())
68            .field("ulp_cp_mem_addr_size", &self.ulp_cp_mem_addr_size())
69            .field("ulp_cp_clk_fo", &self.ulp_cp_clk_fo())
70            .field("ulp_cp_reset", &self.ulp_cp_reset())
71            .field("ulp_cp_force_start_top", &self.ulp_cp_force_start_top())
72            .field("ulp_cp_start_top", &self.ulp_cp_start_top())
73            .finish()
74    }
75}
76impl W {
77    #[doc = "Bits 0:10 - No public"]
78    #[inline(always)]
79    #[must_use]
80    pub fn ulp_cp_mem_addr_init(&mut self) -> ULP_CP_MEM_ADDR_INIT_W<RTC_ULP_CP_CTRL_SPEC> {
81        ULP_CP_MEM_ADDR_INIT_W::new(self, 0)
82    }
83    #[doc = "Bits 11:21 - No public"]
84    #[inline(always)]
85    #[must_use]
86    pub fn ulp_cp_mem_addr_size(&mut self) -> ULP_CP_MEM_ADDR_SIZE_W<RTC_ULP_CP_CTRL_SPEC> {
87        ULP_CP_MEM_ADDR_SIZE_W::new(self, 11)
88    }
89    #[doc = "Bit 22 - No public"]
90    #[inline(always)]
91    #[must_use]
92    pub fn ulp_cp_mem_offst_clr(&mut self) -> ULP_CP_MEM_OFFST_CLR_W<RTC_ULP_CP_CTRL_SPEC> {
93        ULP_CP_MEM_OFFST_CLR_W::new(self, 22)
94    }
95    #[doc = "Bit 28 - ulp coprocessor clk force on"]
96    #[inline(always)]
97    #[must_use]
98    pub fn ulp_cp_clk_fo(&mut self) -> ULP_CP_CLK_FO_W<RTC_ULP_CP_CTRL_SPEC> {
99        ULP_CP_CLK_FO_W::new(self, 28)
100    }
101    #[doc = "Bit 29 - ulp coprocessor clk software reset"]
102    #[inline(always)]
103    #[must_use]
104    pub fn ulp_cp_reset(&mut self) -> ULP_CP_RESET_W<RTC_ULP_CP_CTRL_SPEC> {
105        ULP_CP_RESET_W::new(self, 29)
106    }
107    #[doc = "Bit 30 - 1: ULP-coprocessor is started by SW"]
108    #[inline(always)]
109    #[must_use]
110    pub fn ulp_cp_force_start_top(&mut self) -> ULP_CP_FORCE_START_TOP_W<RTC_ULP_CP_CTRL_SPEC> {
111        ULP_CP_FORCE_START_TOP_W::new(self, 30)
112    }
113    #[doc = "Bit 31 - Write 1 to start ULP-coprocessor"]
114    #[inline(always)]
115    #[must_use]
116    pub fn ulp_cp_start_top(&mut self) -> ULP_CP_START_TOP_W<RTC_ULP_CP_CTRL_SPEC> {
117        ULP_CP_START_TOP_W::new(self, 31)
118    }
119}
120#[doc = "configure ulp\n\nYou can [`read`](crate::Reg::read) this register and get [`rtc_ulp_cp_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rtc_ulp_cp_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
121pub struct RTC_ULP_CP_CTRL_SPEC;
122impl crate::RegisterSpec for RTC_ULP_CP_CTRL_SPEC {
123    type Ux = u32;
124}
125#[doc = "`read()` method returns [`rtc_ulp_cp_ctrl::R`](R) reader structure"]
126impl crate::Readable for RTC_ULP_CP_CTRL_SPEC {}
127#[doc = "`write(|w| ..)` method takes [`rtc_ulp_cp_ctrl::W`](W) writer structure"]
128impl crate::Writable for RTC_ULP_CP_CTRL_SPEC {
129    type Safety = crate::Unsafe;
130    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
131    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
132}
133#[doc = "`reset()` method sets RTC_ULP_CP_CTRL to value 0x0010_0200"]
134impl crate::Resettable for RTC_ULP_CP_CTRL_SPEC {
135    const RESET_VALUE: u32 = 0x0010_0200;
136}
esp32s3_ulp/rtc_cntl/rtc_ulp_cp_ctrl.rs

esp32s3_ulp/rtc_cntl/
rtc_ulp_cp_ctrl.rs
