Module esp32s3_hal::pac::spi0::ctrl

Expand description

SPI0 control register.

Structs

SPI0 control register.
Register CTRL reader
Register CTRL writer

Type Definitions

Field D_POL reader - The bit is used to set MOSI line polarity, 1: high 0, low
Field D_POL writer - The bit is used to set MOSI line polarity, 1: high 0, low
Field FADDR_OCT reader - Set this bit to enable 8-bit-mode(8-bm) in ADDR phase.
Field FADDR_OCT writer - Set this bit to enable 8-bit-mode(8-bm) in ADDR phase.
Field FASTRD_MODE reader - This bit should be set when SPI_MEM_FREAD_QIO, SPI_MEM_FREAD_DIO, SPI_MEM_FREAD_QUAD or SPI_MEM_FREAD_DUAL is set.
Field FASTRD_MODE writer - This bit should be set when SPI_MEM_FREAD_QIO, SPI_MEM_FREAD_DIO, SPI_MEM_FREAD_QUAD or SPI_MEM_FREAD_DUAL is set.
Field FCMD_DUAL reader - Set this bit to enable 2-bit-mode(2-bm) in CMD phase.
Field FCMD_DUAL writer - Set this bit to enable 2-bit-mode(2-bm) in CMD phase.
Field FCMD_OCT reader - Set this bit to enable 8-bit-mode(8-bm) in CMD phase.
Field FCMD_OCT writer - Set this bit to enable 8-bit-mode(8-bm) in CMD phase.
Field FCMD_QUAD reader - Set this bit to enable 4-bit-mode(4-bm) in CMD phase.
Field FCMD_QUAD writer - Set this bit to enable 4-bit-mode(4-bm) in CMD phase.
Field FDIN_OCT reader - Set this bit to enable 8-bit-mode(8-bm) in DIN phase.
Field FDIN_OCT writer - Set this bit to enable 8-bit-mode(8-bm) in DIN phase.
Field FDOUT_OCT reader - Set this bit to enable 8-bit-mode(8-bm) in DOUT phase.
Field FDOUT_OCT writer - Set this bit to enable 8-bit-mode(8-bm) in DOUT phase.
Field FDUMMY_OUT reader - In the DUMMY phase the signal level of SPI bus is output by the SPI0 controller.
Field FDUMMY_OUT writer - In the DUMMY phase the signal level of SPI bus is output by the SPI0 controller.
Field FREAD_DIO reader - In hardware 0xBB read operation, ADDR phase and DIN phase apply 2 signals(2-bit-mode). 1: enable 0: disable.
Field FREAD_DIO writer - In hardware 0xBB read operation, ADDR phase and DIN phase apply 2 signals(2-bit-mode). 1: enable 0: disable.
Field FREAD_DUAL reader - In hardware 0x3B read operation, DIN phase apply 2 signals. 1: enable 0: disable.
Field FREAD_DUAL writer - In hardware 0x3B read operation, DIN phase apply 2 signals. 1: enable 0: disable.
Field FREAD_QIO reader - In hardware 0xEB read operation, ADDR phase and DIN phase apply 4 signals(4-bit-mode). 1: enable 0: disable.
Field FREAD_QIO writer - In hardware 0xEB read operation, ADDR phase and DIN phase apply 4 signals(4-bit-mode). 1: enable 0: disable.
Field FREAD_QUAD reader - In hardware 0x6B read operation, DIN phase apply 4 signals(4-bit-mode). 1: enable 0: disable.
Field FREAD_QUAD writer - In hardware 0x6B read operation, DIN phase apply 4 signals(4-bit-mode). 1: enable 0: disable.
Field Q_POL reader - The bit is used to set MISO line polarity, 1: high 0, low
Field Q_POL writer - The bit is used to set MISO line polarity, 1: high 0, low
Field WP reader - Write protect signal output when SPI is idle. 1: output high, 0: output low.
Field WP writer - Write protect signal output when SPI is idle. 1: output high, 0: output low.