esp32s2/rtc_i2c/
int_clr.rs

1#[doc = "Register `INT_CLR` writer"]
2pub type W = crate::W<INT_CLR_SPEC>;
3#[doc = "Field `SLAVE_TRAN_COMP` writer - RTC_I2C_SLAVE_TRAN_COMP_INT interrupt clear bit"]
4pub type SLAVE_TRAN_COMP_W<'a, REG> = crate::BitWriter1C<'a, REG>;
5#[doc = "Field `ARBITRATION_LOST` writer - RTC_I2C_ARBITRATION_LOST_INT interrupt clear bit"]
6pub type ARBITRATION_LOST_W<'a, REG> = crate::BitWriter1C<'a, REG>;
7#[doc = "Field `MASTER_TRAN_COMP` writer - RTC_I2C_MASTER_TRAN_COMP_INT interrupt clear bit"]
8pub type MASTER_TRAN_COMP_W<'a, REG> = crate::BitWriter1C<'a, REG>;
9#[doc = "Field `TRANS_COMPLETE` writer - RTC_I2C_TRANS_COMPLETE_INT interrupt clear bit"]
10pub type TRANS_COMPLETE_W<'a, REG> = crate::BitWriter1C<'a, REG>;
11#[doc = "Field `TIME_OUT` writer - RTC_I2C_TIME_OUT_INT interrupt clear bit"]
12pub type TIME_OUT_W<'a, REG> = crate::BitWriter1C<'a, REG>;
13#[doc = "Field `ACK_ERR` writer - RTC_I2C_ACK_ERR_INT interrupt clear bit"]
14pub type ACK_ERR_W<'a, REG> = crate::BitWriter1C<'a, REG>;
15#[doc = "Field `RX_DATA` writer - RTC_I2C_RX_DATA_INT interrupt clear bit"]
16pub type RX_DATA_W<'a, REG> = crate::BitWriter1C<'a, REG>;
17#[doc = "Field `TX_DATA` writer - RTC_I2C_TX_DATA_INT interrupt clear bit"]
18pub type TX_DATA_W<'a, REG> = crate::BitWriter1C<'a, REG>;
19#[doc = "Field `DETECT_START` writer - RTC_I2C_DETECT_START_INT interrupt clear bit"]
20pub type DETECT_START_W<'a, REG> = crate::BitWriter1C<'a, REG>;
21#[cfg(feature = "impl-register-debug")]
22impl core::fmt::Debug for crate::generic::Reg<INT_CLR_SPEC> {
23    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
24        write!(f, "(not readable)")
25    }
26}
27impl W {
28    #[doc = "Bit 0 - RTC_I2C_SLAVE_TRAN_COMP_INT interrupt clear bit"]
29    #[inline(always)]
30    pub fn slave_tran_comp(&mut self) -> SLAVE_TRAN_COMP_W<INT_CLR_SPEC> {
31        SLAVE_TRAN_COMP_W::new(self, 0)
32    }
33    #[doc = "Bit 1 - RTC_I2C_ARBITRATION_LOST_INT interrupt clear bit"]
34    #[inline(always)]
35    pub fn arbitration_lost(&mut self) -> ARBITRATION_LOST_W<INT_CLR_SPEC> {
36        ARBITRATION_LOST_W::new(self, 1)
37    }
38    #[doc = "Bit 2 - RTC_I2C_MASTER_TRAN_COMP_INT interrupt clear bit"]
39    #[inline(always)]
40    pub fn master_tran_comp(&mut self) -> MASTER_TRAN_COMP_W<INT_CLR_SPEC> {
41        MASTER_TRAN_COMP_W::new(self, 2)
42    }
43    #[doc = "Bit 3 - RTC_I2C_TRANS_COMPLETE_INT interrupt clear bit"]
44    #[inline(always)]
45    pub fn trans_complete(&mut self) -> TRANS_COMPLETE_W<INT_CLR_SPEC> {
46        TRANS_COMPLETE_W::new(self, 3)
47    }
48    #[doc = "Bit 4 - RTC_I2C_TIME_OUT_INT interrupt clear bit"]
49    #[inline(always)]
50    pub fn time_out(&mut self) -> TIME_OUT_W<INT_CLR_SPEC> {
51        TIME_OUT_W::new(self, 4)
52    }
53    #[doc = "Bit 5 - RTC_I2C_ACK_ERR_INT interrupt clear bit"]
54    #[inline(always)]
55    pub fn ack_err(&mut self) -> ACK_ERR_W<INT_CLR_SPEC> {
56        ACK_ERR_W::new(self, 5)
57    }
58    #[doc = "Bit 6 - RTC_I2C_RX_DATA_INT interrupt clear bit"]
59    #[inline(always)]
60    pub fn rx_data(&mut self) -> RX_DATA_W<INT_CLR_SPEC> {
61        RX_DATA_W::new(self, 6)
62    }
63    #[doc = "Bit 7 - RTC_I2C_TX_DATA_INT interrupt clear bit"]
64    #[inline(always)]
65    pub fn tx_data(&mut self) -> TX_DATA_W<INT_CLR_SPEC> {
66        TX_DATA_W::new(self, 7)
67    }
68    #[doc = "Bit 8 - RTC_I2C_DETECT_START_INT interrupt clear bit"]
69    #[inline(always)]
70    pub fn detect_start(&mut self) -> DETECT_START_W<INT_CLR_SPEC> {
71        DETECT_START_W::new(self, 8)
72    }
73}
74#[doc = "Clear RTC I2C interrupt\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
75pub struct INT_CLR_SPEC;
76impl crate::RegisterSpec for INT_CLR_SPEC {
77    type Ux = u32;
78}
79#[doc = "`write(|w| ..)` method takes [`int_clr::W`](W) writer structure"]
80impl crate::Writable for INT_CLR_SPEC {
81    type Safety = crate::Unsafe;
82    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
83    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x01ff;
84}
85#[doc = "`reset()` method sets INT_CLR to value 0"]
86impl crate::Resettable for INT_CLR_SPEC {
87    const RESET_VALUE: u32 = 0;
88}
esp32s2/rtc_i2c/int_clr.rs

esp32s2/rtc_i2c/
int_clr.rs
