1#[doc = "Register `INT_ST` reader"]
2pub type R = crate::R<INT_ST_SPEC>;
3#[doc = "Field `RXFIFO_WM` reader - The masked interrupt status bit for I2C_RXFIFO_WM_INT interrupt."]
4pub type RXFIFO_WM_R = crate::BitReader;
5#[doc = "Field `TXFIFO_WM` reader - The masked interrupt status bit for I2C_TXFIFO_WM_INT interrupt."]
6pub type TXFIFO_WM_R = crate::BitReader;
7#[doc = "Field `RXFIFO_OVF` reader - The masked interrupt status bit for I2C_RXFIFO_OVF_INT interrupt."]
8pub type RXFIFO_OVF_R = crate::BitReader;
9#[doc = "Field `END_DETECT` reader - The masked interrupt status bit for the I2C_END_DETECT_INT interrupt."]
10pub type END_DETECT_R = crate::BitReader;
11#[doc = "Field `BYTE_TRANS_DONE` reader - The masked interrupt status bit for the I2C_END_DETECT_INT interrupt."]
12pub type BYTE_TRANS_DONE_R = crate::BitReader;
13#[doc = "Field `ARBITRATION_LOST` reader - The masked interrupt status bit for the I2C_ARBITRATION_LOST_INT interrupt."]
14pub type ARBITRATION_LOST_R = crate::BitReader;
15#[doc = "Field `MST_TXFIFO_UDF` reader - The masked interrupt status bit for I2C_TRANS_COMPLETE_INT interrupt."]
16pub type MST_TXFIFO_UDF_R = crate::BitReader;
17#[doc = "Field `TRANS_COMPLETE` reader - The masked interrupt status bit for the I2C_TRANS_COMPLETE_INT interrupt."]
18pub type TRANS_COMPLETE_R = crate::BitReader;
19#[doc = "Field `TIME_OUT` reader - The masked interrupt status bit for the I2C_TIME_OUT_INT interrupt."]
20pub type TIME_OUT_R = crate::BitReader;
21#[doc = "Field `TRANS_START` reader - The masked interrupt status bit for the I2C_TRANS_START_INT interrupt."]
22pub type TRANS_START_R = crate::BitReader;
23#[doc = "Field `NACK` reader - The masked interrupt status bit for I2C_SLAVE_STRETCH_INT interrupt."]
24pub type NACK_R = crate::BitReader;
25#[doc = "Field `TXFIFO_OVF` reader - The masked interrupt status bit for I2C_TXFIFO_OVF_INT interrupt."]
26pub type TXFIFO_OVF_R = crate::BitReader;
27#[doc = "Field `RXFIFO_UDF` reader - The masked interrupt status bit for I2C_RXFIFO_UDF_INT interrupt."]
28pub type RXFIFO_UDF_R = crate::BitReader;
29#[doc = "Field `SCL_ST_TO` reader - The masked interrupt status bit for I2C_SCL_ST_TO_INT interrupt."]
30pub type SCL_ST_TO_R = crate::BitReader;
31#[doc = "Field `SCL_MAIN_ST_TO` reader - The masked interrupt status bit for I2C_SCL_MAIN_ST_TO_INT interrupt."]
32pub type SCL_MAIN_ST_TO_R = crate::BitReader;
33#[doc = "Field `DET_START` reader - The masked interrupt status bit for I2C_DET_START_INT interrupt."]
34pub type DET_START_R = crate::BitReader;
35#[doc = "Field `SLAVE_STRETCH` reader - The masked interrupt status bit for I2C_SLAVE_STRETCH_INT interrupt."]
36pub type SLAVE_STRETCH_R = crate::BitReader;
37impl R {
38 #[doc = "Bit 0 - The masked interrupt status bit for I2C_RXFIFO_WM_INT interrupt."]
39 #[inline(always)]
40 pub fn rxfifo_wm(&self) -> RXFIFO_WM_R {
41 RXFIFO_WM_R::new((self.bits & 1) != 0)
42 }
43 #[doc = "Bit 1 - The masked interrupt status bit for I2C_TXFIFO_WM_INT interrupt."]
44 #[inline(always)]
45 pub fn txfifo_wm(&self) -> TXFIFO_WM_R {
46 TXFIFO_WM_R::new(((self.bits >> 1) & 1) != 0)
47 }
48 #[doc = "Bit 2 - The masked interrupt status bit for I2C_RXFIFO_OVF_INT interrupt."]
49 #[inline(always)]
50 pub fn rxfifo_ovf(&self) -> RXFIFO_OVF_R {
51 RXFIFO_OVF_R::new(((self.bits >> 2) & 1) != 0)
52 }
53 #[doc = "Bit 3 - The masked interrupt status bit for the I2C_END_DETECT_INT interrupt."]
54 #[inline(always)]
55 pub fn end_detect(&self) -> END_DETECT_R {
56 END_DETECT_R::new(((self.bits >> 3) & 1) != 0)
57 }
58 #[doc = "Bit 4 - The masked interrupt status bit for the I2C_END_DETECT_INT interrupt."]
59 #[inline(always)]
60 pub fn byte_trans_done(&self) -> BYTE_TRANS_DONE_R {
61 BYTE_TRANS_DONE_R::new(((self.bits >> 4) & 1) != 0)
62 }
63 #[doc = "Bit 5 - The masked interrupt status bit for the I2C_ARBITRATION_LOST_INT interrupt."]
64 #[inline(always)]
65 pub fn arbitration_lost(&self) -> ARBITRATION_LOST_R {
66 ARBITRATION_LOST_R::new(((self.bits >> 5) & 1) != 0)
67 }
68 #[doc = "Bit 6 - The masked interrupt status bit for I2C_TRANS_COMPLETE_INT interrupt."]
69 #[inline(always)]
70 pub fn mst_txfifo_udf(&self) -> MST_TXFIFO_UDF_R {
71 MST_TXFIFO_UDF_R::new(((self.bits >> 6) & 1) != 0)
72 }
73 #[doc = "Bit 7 - The masked interrupt status bit for the I2C_TRANS_COMPLETE_INT interrupt."]
74 #[inline(always)]
75 pub fn trans_complete(&self) -> TRANS_COMPLETE_R {
76 TRANS_COMPLETE_R::new(((self.bits >> 7) & 1) != 0)
77 }
78 #[doc = "Bit 8 - The masked interrupt status bit for the I2C_TIME_OUT_INT interrupt."]
79 #[inline(always)]
80 pub fn time_out(&self) -> TIME_OUT_R {
81 TIME_OUT_R::new(((self.bits >> 8) & 1) != 0)
82 }
83 #[doc = "Bit 9 - The masked interrupt status bit for the I2C_TRANS_START_INT interrupt."]
84 #[inline(always)]
85 pub fn trans_start(&self) -> TRANS_START_R {
86 TRANS_START_R::new(((self.bits >> 9) & 1) != 0)
87 }
88 #[doc = "Bit 10 - The masked interrupt status bit for I2C_SLAVE_STRETCH_INT interrupt."]
89 #[inline(always)]
90 pub fn nack(&self) -> NACK_R {
91 NACK_R::new(((self.bits >> 10) & 1) != 0)
92 }
93 #[doc = "Bit 11 - The masked interrupt status bit for I2C_TXFIFO_OVF_INT interrupt."]
94 #[inline(always)]
95 pub fn txfifo_ovf(&self) -> TXFIFO_OVF_R {
96 TXFIFO_OVF_R::new(((self.bits >> 11) & 1) != 0)
97 }
98 #[doc = "Bit 12 - The masked interrupt status bit for I2C_RXFIFO_UDF_INT interrupt."]
99 #[inline(always)]
100 pub fn rxfifo_udf(&self) -> RXFIFO_UDF_R {
101 RXFIFO_UDF_R::new(((self.bits >> 12) & 1) != 0)
102 }
103 #[doc = "Bit 13 - The masked interrupt status bit for I2C_SCL_ST_TO_INT interrupt."]
104 #[inline(always)]
105 pub fn scl_st_to(&self) -> SCL_ST_TO_R {
106 SCL_ST_TO_R::new(((self.bits >> 13) & 1) != 0)
107 }
108 #[doc = "Bit 14 - The masked interrupt status bit for I2C_SCL_MAIN_ST_TO_INT interrupt."]
109 #[inline(always)]
110 pub fn scl_main_st_to(&self) -> SCL_MAIN_ST_TO_R {
111 SCL_MAIN_ST_TO_R::new(((self.bits >> 14) & 1) != 0)
112 }
113 #[doc = "Bit 15 - The masked interrupt status bit for I2C_DET_START_INT interrupt."]
114 #[inline(always)]
115 pub fn det_start(&self) -> DET_START_R {
116 DET_START_R::new(((self.bits >> 15) & 1) != 0)
117 }
118 #[doc = "Bit 16 - The masked interrupt status bit for I2C_SLAVE_STRETCH_INT interrupt."]
119 #[inline(always)]
120 pub fn slave_stretch(&self) -> SLAVE_STRETCH_R {
121 SLAVE_STRETCH_R::new(((self.bits >> 16) & 1) != 0)
122 }
123}
124#[cfg(feature = "impl-register-debug")]
125impl core::fmt::Debug for R {
126 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
127 f.debug_struct("INT_ST")
128 .field("rxfifo_wm", &self.rxfifo_wm())
129 .field("txfifo_wm", &self.txfifo_wm())
130 .field("rxfifo_ovf", &self.rxfifo_ovf())
131 .field("end_detect", &self.end_detect())
132 .field("byte_trans_done", &self.byte_trans_done())
133 .field("arbitration_lost", &self.arbitration_lost())
134 .field("mst_txfifo_udf", &self.mst_txfifo_udf())
135 .field("trans_complete", &self.trans_complete())
136 .field("time_out", &self.time_out())
137 .field("trans_start", &self.trans_start())
138 .field("nack", &self.nack())
139 .field("txfifo_ovf", &self.txfifo_ovf())
140 .field("rxfifo_udf", &self.rxfifo_udf())
141 .field("scl_st_to", &self.scl_st_to())
142 .field("scl_main_st_to", &self.scl_main_st_to())
143 .field("det_start", &self.det_start())
144 .field("slave_stretch", &self.slave_stretch())
145 .finish()
146 }
147}
148#[doc = "Status of captured I2C communication events\n\nYou can [`read`](crate::Reg::read) this register and get [`int_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
149pub struct INT_ST_SPEC;
150impl crate::RegisterSpec for INT_ST_SPEC {
151 type Ux = u32;
152}
153#[doc = "`read()` method returns [`int_st::R`](R) reader structure"]
154impl crate::Readable for INT_ST_SPEC {}
155#[doc = "`reset()` method sets INT_ST to value 0"]
156impl crate::Resettable for INT_ST_SPEC {
157 const RESET_VALUE: u32 = 0;
158}