esp32s2/extmem/
cache_conf_misc.rs

1#[doc = "Register `CACHE_CONF_MISC` reader"]
2pub type R = crate::R<CACHE_CONF_MISC_SPEC>;
3#[doc = "Register `CACHE_CONF_MISC` writer"]
4pub type W = crate::W<CACHE_CONF_MISC_SPEC>;
5#[doc = "Field `PRO_CACHE_IGNORE_PRELOAD_MMU_ENTRY_FAULT` reader - The bit is used to disable checking mmu entry fault by preload operation."]
6pub type PRO_CACHE_IGNORE_PRELOAD_MMU_ENTRY_FAULT_R = crate::BitReader;
7#[doc = "Field `PRO_CACHE_IGNORE_PRELOAD_MMU_ENTRY_FAULT` writer - The bit is used to disable checking mmu entry fault by preload operation."]
8pub type PRO_CACHE_IGNORE_PRELOAD_MMU_ENTRY_FAULT_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `PRO_CACHE_IGNORE_SYNC_MMU_ENTRY_FAULT` reader - The bit is used to disable checking mmu entry fault by sync operation."]
10pub type PRO_CACHE_IGNORE_SYNC_MMU_ENTRY_FAULT_R = crate::BitReader;
11#[doc = "Field `PRO_CACHE_IGNORE_SYNC_MMU_ENTRY_FAULT` writer - The bit is used to disable checking mmu entry fault by sync operation."]
12pub type PRO_CACHE_IGNORE_SYNC_MMU_ENTRY_FAULT_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    #[doc = "Bit 0 - The bit is used to disable checking mmu entry fault by preload operation."]
15    #[inline(always)]
16    pub fn pro_cache_ignore_preload_mmu_entry_fault(
17        &self,
18    ) -> PRO_CACHE_IGNORE_PRELOAD_MMU_ENTRY_FAULT_R {
19        PRO_CACHE_IGNORE_PRELOAD_MMU_ENTRY_FAULT_R::new((self.bits & 1) != 0)
20    }
21    #[doc = "Bit 1 - The bit is used to disable checking mmu entry fault by sync operation."]
22    #[inline(always)]
23    pub fn pro_cache_ignore_sync_mmu_entry_fault(&self) -> PRO_CACHE_IGNORE_SYNC_MMU_ENTRY_FAULT_R {
24        PRO_CACHE_IGNORE_SYNC_MMU_ENTRY_FAULT_R::new(((self.bits >> 1) & 1) != 0)
25    }
26}
27#[cfg(feature = "impl-register-debug")]
28impl core::fmt::Debug for R {
29    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
30        f.debug_struct("CACHE_CONF_MISC")
31            .field(
32                "pro_cache_ignore_preload_mmu_entry_fault",
33                &self.pro_cache_ignore_preload_mmu_entry_fault(),
34            )
35            .field(
36                "pro_cache_ignore_sync_mmu_entry_fault",
37                &self.pro_cache_ignore_sync_mmu_entry_fault(),
38            )
39            .finish()
40    }
41}
42impl W {
43    #[doc = "Bit 0 - The bit is used to disable checking mmu entry fault by preload operation."]
44    #[inline(always)]
45    pub fn pro_cache_ignore_preload_mmu_entry_fault(
46        &mut self,
47    ) -> PRO_CACHE_IGNORE_PRELOAD_MMU_ENTRY_FAULT_W<CACHE_CONF_MISC_SPEC> {
48        PRO_CACHE_IGNORE_PRELOAD_MMU_ENTRY_FAULT_W::new(self, 0)
49    }
50    #[doc = "Bit 1 - The bit is used to disable checking mmu entry fault by sync operation."]
51    #[inline(always)]
52    pub fn pro_cache_ignore_sync_mmu_entry_fault(
53        &mut self,
54    ) -> PRO_CACHE_IGNORE_SYNC_MMU_ENTRY_FAULT_W<CACHE_CONF_MISC_SPEC> {
55        PRO_CACHE_IGNORE_SYNC_MMU_ENTRY_FAULT_W::new(self, 1)
56    }
57}
58#[doc = "register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_conf_misc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_conf_misc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
59pub struct CACHE_CONF_MISC_SPEC;
60impl crate::RegisterSpec for CACHE_CONF_MISC_SPEC {
61    type Ux = u32;
62}
63#[doc = "`read()` method returns [`cache_conf_misc::R`](R) reader structure"]
64impl crate::Readable for CACHE_CONF_MISC_SPEC {}
65#[doc = "`write(|w| ..)` method takes [`cache_conf_misc::W`](W) writer structure"]
66impl crate::Writable for CACHE_CONF_MISC_SPEC {
67    type Safety = crate::Unsafe;
68}
69#[doc = "`reset()` method sets CACHE_CONF_MISC to value 0x03"]
70impl crate::Resettable for CACHE_CONF_MISC_SPEC {
71    const RESET_VALUE: u32 = 0x03;
72}
esp32s2/extmem/cache_conf_misc.rs

esp32s2/extmem/
cache_conf_misc.rs
