Module int_st

Masked interrupt status

Structs

INT_ST_SPEC

Masked interrupt status

Type Aliases

DMA_INFIFO_FULL_WM_R

Field DMA_INFIFO_FULL_WM reader - This is the masked interrupt bit for UHCI_DMA_INFIFO_FULL_WM_INT INTERRUPT when UHCI_DMA_INFIFO_FULL_WM_INT_ENA is set to 1.

IN_DONE_R

Field IN_DONE reader - This is the masked interrupt bit for UHCI_IN_DONE_INT interrupt when UHCI_IN_DONE_INT_ENA is set to 1.

IN_DSCR_EMPTY_R

Field IN_DSCR_EMPTY reader - This is the masked interrupt bit for UHCI_IN_DSCR_EMPTY_INT interrupt when UHCI_IN_DSCR_EMPTY_INT_ENA is set to 1.

IN_DSCR_ERR_R

Field IN_DSCR_ERR reader - This is the masked interrupt bit for UHCI_IN_DSCR_ERR_INT interrupt when UHCI_IN_DSCR_ERR_INT is set to 1.

IN_ERR_EOF_R

Field IN_ERR_EOF reader - This is the masked interrupt bit for UHCI_IN_ERR_EOF_INT interrupt when UHCI_IN_ERR_EOF_INT_ENA is set to 1.

IN_SUC_EOF_R

Field IN_SUC_EOF reader - This is the masked interrupt bit for UHCI_IN_SUC_EOF_INT interrupt when UHCI_IN_SUC_EOF_INT_ENA is set to 1.

OUTLINK_EOF_ERR_R

Field OUTLINK_EOF_ERR reader - This is the masked interrupt bit for UHCI_OUTLINK_EOF_ERR_INT interrupt when UHCI_OUTLINK_EOF_ERR_INT_ENA is set to 1.

OUT_DONE_R

Field OUT_DONE reader - This is the masked interrupt bit for UHCI_OUT_DONE_INT interrupt when UHCI_OUT_DONE_INT_ENA is set to 1.

OUT_DSCR_ERR_R

Field OUT_DSCR_ERR reader - This is the masked interrupt bit for UHCI_OUT_DSCR_ERR_INT interrupt when UHCI_OUT_DSCR_ERR_INT_ENA is set to 1.

OUT_EOF_R

Field OUT_EOF reader - This is the masked interrupt bit for UHCI_OUT_EOF_INT interrupt when UHCI_OUT_EOF_INT_ENA is set to 1.

OUT_TOTAL_EOF_R

Field OUT_TOTAL_EOF reader - This is the masked interrupt bit for UHCI_OUT_TOTAL_EOF_INT interrupt when UHCI_OUT_TOTAL_EOF_INT_ENA is set to 1.

R

Register INT_ST reader

RX_HUNG_R

Field RX_HUNG reader - This is the masked interrupt bit for UHCI_RX_HUNG_INT interrupt when UHCI_RX_HUNG_INT_ENA is set to 1.

RX_START_R

Field RX_START reader - This is the masked interrupt bit for UHCI_RX_START_INT interrupt when UHCI_RX_START_INT_ENA is set to 1.

SEND_A_REG_Q_R

Field SEND_A_REG_Q reader - This is the masked interrupt bit for UHCI_SEND_A_REG_Q_INT interrupt when UHCI_SEND_A_REG_Q_INT_ENA is set to 1.

SEND_S_REG_Q_R

Field SEND_S_REG_Q reader - This is the masked interrupt bit for UHCI_SEND_S_REG_Q_INT interrupt when UHCI_SEND_S_REG_Q_INT_ENA is set to 1.

TX_HUNG_R

Field TX_HUNG reader - This is the masked interrupt bit for UHCI_TX_HUNG_INT interrupt when UHCI_TX_HUNG_INT_ENA is set to 1.

TX_START_R

Field TX_START reader - This is the masked interrupt bit for UHCI_TX_START_INT interrupt when UHCI_TX_START_INT_ENA is set to 1.