Module misc

SPI misc register

Structs

MISC_SPEC

SPI misc register

Type Aliases

ADDR_DTR_EN_R

Field ADDR_DTR_EN reader - 1: SPI clk and data of SPI_SEND_ADDR state are in DTR mode, including master 1/2/4/8-bm. 0: SPI clk and data of SPI_SEND_ADDR state are in STR mode. Can be configured in CONF state.

ADDR_DTR_EN_W

Field ADDR_DTR_EN writer - 1: SPI clk and data of SPI_SEND_ADDR state are in DTR mode, including master 1/2/4/8-bm. 0: SPI clk and data of SPI_SEND_ADDR state are in STR mode. Can be configured in CONF state.

CD_ADDR_SET_R

Field CD_ADDR_SET reader - 1: spi_cd = !SPI_CD_IDLE_EDGE when SPI_ST[3:0] is in SPI_SEND_ADDR state. 0: spi_cd = SPI_CD_IDLE_EDGE. Can be configured in CONF state.

CD_ADDR_SET_W

Field CD_ADDR_SET writer - 1: spi_cd = !SPI_CD_IDLE_EDGE when SPI_ST[3:0] is in SPI_SEND_ADDR state. 0: spi_cd = SPI_CD_IDLE_EDGE. Can be configured in CONF state.

CD_CMD_SET_R

Field CD_CMD_SET reader - 1: spi_cd = !SPI_CD_IDLE_EDGE when SPI_ST[3:0] is in SPI_SEND_CMD state. 0: spi_cd = SPI_CD_IDLE_EDGE. Can be configured in CONF state.

CD_CMD_SET_W

Field CD_CMD_SET writer - 1: spi_cd = !SPI_CD_IDLE_EDGE when SPI_ST[3:0] is in SPI_SEND_CMD state. 0: spi_cd = SPI_CD_IDLE_EDGE. Can be configured in CONF state.

CD_DATA_SET_R

Field CD_DATA_SET reader - 1: spi_cd = !SPI_CD_IDLE_EDGE when SPI_ST[3:0] is in SPI_DOUT or SPI_DIN state. 0: spi_cd = SPI_CD_IDLE_EDGE. Can be configured in CONF state.

CD_DATA_SET_W

Field CD_DATA_SET writer - 1: spi_cd = !SPI_CD_IDLE_EDGE when SPI_ST[3:0] is in SPI_DOUT or SPI_DIN state. 0: spi_cd = SPI_CD_IDLE_EDGE. Can be configured in CONF state.

CD_DUMMY_SET_R

Field CD_DUMMY_SET reader - 1: spi_cd = !SPI_CD_IDLE_EDGE when SPI_ST[3:0] is in SPI_DUMMY state. 0: spi_cd = SPI_CD_IDLE_EDGE. Can be configured in CONF state.

CD_DUMMY_SET_W

Field CD_DUMMY_SET writer - 1: spi_cd = !SPI_CD_IDLE_EDGE when SPI_ST[3:0] is in SPI_DUMMY state. 0: spi_cd = SPI_CD_IDLE_EDGE. Can be configured in CONF state.

CD_IDLE_EDGE_R

Field CD_IDLE_EDGE reader - The default value of spi_cd. Can be configured in CONF state.

CD_IDLE_EDGE_W

Field CD_IDLE_EDGE writer - The default value of spi_cd. Can be configured in CONF state.

CK_DIS_R

Field CK_DIS reader - 1: spi clk out disable, 0: spi clk out enable. Can be configured in CONF state.

CK_DIS_W

Field CK_DIS writer - 1: spi clk out disable, 0: spi clk out enable. Can be configured in CONF state.

CK_IDLE_EDGE_R

Field CK_IDLE_EDGE reader - 1: spi clk line is high when idle 0: spi clk line is low when idle. Can be configured in CONF state.

CK_IDLE_EDGE_W

Field CK_IDLE_EDGE writer - 1: spi clk line is high when idle 0: spi clk line is low when idle. Can be configured in CONF state.

CLK_DATA_DTR_EN_R

Field CLK_DATA_DTR_EN reader - 1: SPI master DTR mode is applied to SPI clk, data and spi_dqs. 0: SPI master DTR mode is only applied to spi_dqs. This bit should be used with bit 17/18/19.

CLK_DATA_DTR_EN_W

Field CLK_DATA_DTR_EN writer - 1: SPI master DTR mode is applied to SPI clk, data and spi_dqs. 0: SPI master DTR mode is only applied to spi_dqs. This bit should be used with bit 17/18/19.

CMD_DTR_EN_R

Field CMD_DTR_EN reader - 1: SPI clk and data of SPI_SEND_CMD state are in DTR mode, including master 1/2/4/8-bm. 0: SPI clk and data of SPI_SEND_CMD state are in STR mode. Can be configured in CONF state.

CMD_DTR_EN_W

Field CMD_DTR_EN writer - 1: SPI clk and data of SPI_SEND_CMD state are in DTR mode, including master 1/2/4/8-bm. 0: SPI clk and data of SPI_SEND_CMD state are in STR mode. Can be configured in CONF state.

CS_DIS_R

Field CS_DIS(0-5) reader - Set this bit to raise high SPI_CS%s pin, which means that the SPI device(Ext_RAM(0)/flash(1)) connected to SPI_CS%s is in low level when SPI1 transfer starts

CS_DIS_W

Field CS_DIS(0-5) writer - Set this bit to raise high SPI_CS%s pin, which means that the SPI device(Ext_RAM(0)/flash(1)) connected to SPI_CS%s is in low level when SPI1 transfer starts

CS_KEEP_ACTIVE_R

Field CS_KEEP_ACTIVE reader - spi cs line keep low when the bit is set. Can be configured in CONF state.

CS_KEEP_ACTIVE_W

Field CS_KEEP_ACTIVE writer - spi cs line keep low when the bit is set. Can be configured in CONF state.

DATA_DTR_EN_R

Field DATA_DTR_EN reader - 1: SPI clk and data of SPI_DOUT and SPI_DIN state are in DTR mode, including master 1/2/4/8-bm. 0: SPI clk and data of SPI_DOUT and SPI_DIN state are in STR mode. Can be configured in CONF state.

DATA_DTR_EN_W

Field DATA_DTR_EN writer - 1: SPI clk and data of SPI_DOUT and SPI_DIN state are in DTR mode, including master 1/2/4/8-bm. 0: SPI clk and data of SPI_DOUT and SPI_DIN state are in STR mode. Can be configured in CONF state.

DQS_IDLE_EDGE_R

Field DQS_IDLE_EDGE reader - The default value of spi_dqs. Can be configured in CONF state.

DQS_IDLE_EDGE_W

Field DQS_IDLE_EDGE writer - The default value of spi_dqs. Can be configured in CONF state.

MASTER_CS_POL_R

Field MASTER_CS_POL reader - In the master mode the bits are the polarity of spi cs line, the value is equivalent to spi_cs ^ SPI_MASTER_CS_POL. Can be configured in CONF state.

MASTER_CS_POL_W

Field MASTER_CS_POL writer - In the master mode the bits are the polarity of spi cs line, the value is equivalent to spi_cs ^ SPI_MASTER_CS_POL. Can be configured in CONF state.

QUAD_DIN_PIN_SWAP_R

Field QUAD_DIN_PIN_SWAP reader - 1: spi quad input swap enable 0: spi quad input swap disable. Can be configured in CONF state.

QUAD_DIN_PIN_SWAP_W

Field QUAD_DIN_PIN_SWAP writer - 1: spi quad input swap enable 0: spi quad input swap disable. Can be configured in CONF state.

R

Register MISC reader

SLAVE_CS_POL_R

Field SLAVE_CS_POL reader - spi slave input cs polarity select. 1: inv 0: not change. Can be configured in CONF state.

SLAVE_CS_POL_W

Field SLAVE_CS_POL writer - spi slave input cs polarity select. 1: inv 0: not change. Can be configured in CONF state.

W

Register MISC writer