Expand description
SPI output delay mode configuration
Structs§
- DOUT_
MODE_ SPEC - SPI output delay mode configuration
Type Aliases§
- DOUT0_
MODE_ R - Field
DOUT0_MODE
reader - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state. - DOUT0_
MODE_ W - Field
DOUT0_MODE
writer - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state. - DOUT1_
MODE_ R - Field
DOUT1_MODE
reader - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state. - DOUT1_
MODE_ W - Field
DOUT1_MODE
writer - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state. - DOUT2_
MODE_ R - Field
DOUT2_MODE
reader - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state. - DOUT2_
MODE_ W - Field
DOUT2_MODE
writer - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state. - DOUT3_
MODE_ R - Field
DOUT3_MODE
reader - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state. - DOUT3_
MODE_ W - Field
DOUT3_MODE
writer - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state. - DOUT4_
MODE_ R - Field
DOUT4_MODE
reader - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state. - DOUT4_
MODE_ W - Field
DOUT4_MODE
writer - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state. - DOUT5_
MODE_ R - Field
DOUT5_MODE
reader - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state. - DOUT5_
MODE_ W - Field
DOUT5_MODE
writer - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state. - DOUT6_
MODE_ R - Field
DOUT6_MODE
reader - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state. - DOUT6_
MODE_ W - Field
DOUT6_MODE
writer - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state. - DOUT7_
MODE_ R - Field
DOUT7_MODE
reader - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state. - DOUT7_
MODE_ W - Field
DOUT7_MODE
writer - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state. - R
- Register
DOUT_MODE
reader - W
- Register
DOUT_MODE
writer