Module fifo_conf

I2S FIFO configuration register

Structs

FIFO_CONF_SPEC

I2S FIFO configuration register

Type Aliases

DSCR_EN_R

Field DSCR_EN reader - Set this bit to enable I2S DMA mode.

DSCR_EN_W

Field DSCR_EN writer - Set this bit to enable I2S DMA mode.

R

Register FIFO_CONF reader

RX_24MSB_EN_R

Field RX_24MSB_EN reader - Only useful in rx 24bit mode. 1: the high 24 bits are effective in i2s fifo 0: the low 24 bits are effective in i2s fifo

RX_24MSB_EN_W

Field RX_24MSB_EN writer - Only useful in rx 24bit mode. 1: the high 24 bits are effective in i2s fifo 0: the low 24 bits are effective in i2s fifo

RX_DATA_NUM_R

Field RX_DATA_NUM reader - I2S_RX_TAKE_DATA_INT is triggered when the left and right channel data number in RX FIFO is larger than the value of I2S_RX_DATA_NUM[5:0]. (RX FIFO is almost full threshold.)

RX_DATA_NUM_W

Field RX_DATA_NUM writer - I2S_RX_TAKE_DATA_INT is triggered when the left and right channel data number in RX FIFO is larger than the value of I2S_RX_DATA_NUM[5:0]. (RX FIFO is almost full threshold.)

RX_FIFO_MOD_FORCE_EN_R

Field RX_FIFO_MOD_FORCE_EN reader - The bit should always be set to 1

RX_FIFO_MOD_FORCE_EN_W

Field RX_FIFO_MOD_FORCE_EN writer - The bit should always be set to 1

RX_FIFO_MOD_R

Field RX_FIFO_MOD reader - Receiver FIFO mode configuration bits

RX_FIFO_MOD_W

Field RX_FIFO_MOD writer - Receiver FIFO mode configuration bits

RX_FIFO_SYNC_R

Field RX_FIFO_SYNC reader - force write back rx data to memory

RX_FIFO_SYNC_W

Field RX_FIFO_SYNC writer - force write back rx data to memory

TX_24MSB_EN_R

Field TX_24MSB_EN reader - Only useful in tx 24bit mode. 1: the high 24 bits are effective in i2s fifo 0: the low 24 bits are effective in i2s fifo

TX_24MSB_EN_W

Field TX_24MSB_EN writer - Only useful in tx 24bit mode. 1: the high 24 bits are effective in i2s fifo 0: the low 24 bits are effective in i2s fifo

TX_DATA_NUM_R

Field TX_DATA_NUM reader - I2S_TX_PUT_DATA_INT is triggered when the left and right channel data number in TX FIFO is smaller than the value of I2S_TX_DATA_NUM[5:0]. (TX FIFO is almost empty threshold.)

TX_DATA_NUM_W

Field TX_DATA_NUM writer - I2S_TX_PUT_DATA_INT is triggered when the left and right channel data number in TX FIFO is smaller than the value of I2S_TX_DATA_NUM[5:0]. (TX FIFO is almost empty threshold.)

TX_FIFO_MOD_FORCE_EN_R

Field TX_FIFO_MOD_FORCE_EN reader - The bit should always be set to 1

TX_FIFO_MOD_FORCE_EN_W

Field TX_FIFO_MOD_FORCE_EN writer - The bit should always be set to 1

TX_FIFO_MOD_R

Field TX_FIFO_MOD reader - Transmitter FIFO mode configuration bits

TX_FIFO_MOD_W

Field TX_FIFO_MOD writer - Transmitter FIFO mode configuration bits

W

Register FIFO_CONF writer