Module clock_gate

Source
Expand description

GPIO clock gating register

Structs§

CLOCK_GATE_SPEC
GPIO clock gating register

Type Aliases§

CLK_EN_R
Field CLK_EN reader - Clock gating enable bit. If set to 1, the clock is free running.
CLK_EN_W
Field CLK_EN writer - Clock gating enable bit. If set to 1, the clock is free running.
R
Register CLOCK_GATE reader
W
Register CLOCK_GATE writer